Abstract: The invention relates to a circuit for generating a true, circuit-specific and time-invariant random binary number, having: a matrix of K?L delay elements that can be connected to each other by means of L?1 single or double commutation circuits into chains of delay elements of length L, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, wherein the setting of the commutation circuits, the demultiplexer, and the multiplexer can be prescribed by a control signal, wherein the circuit comprises a channel code encoder whereby code words of a channel code can be generated and a transcriber, whereby code words of the channel code can be transcribed into the control signal of the L?1 single or double commutation circuits, and a method for generating a true, circuit-specific and time-invariant random number by means of a matrix of L?K delay elements, L?1 single or double commutation circuits, a single or double

Abstract: A method for calculating a modular multiplication of integers a and b or polynomials a(x) and b(x) for a modulus N. The method including (i) calculating a supplemental product continued fraction c=(ab+jN)/t by supplementing particular numerators of a product fraction (ab)/t represented as a continued fraction, and (ii) calculating a second supplemental product continued fraction r=(cd+kN)/t from a previously calculated modular remainder d=RN[t2] and the calculated supplemental product continued fraction c.

Abstract: The invention relates to a circuit for generating a true, circuit-specific and time-invariant random binary number, having: a matrix of K?L delay elements that can be connected to each other by means of L?1 single or double commutation circuits into chains of delay elements of length L, a single or double demultiplexer connected before the matrix, a single or double multiplexer connection after the matrix, and a run time or number comparator, wherein the setting of the commutation circuits, the demultiplexer, and the multiplexer can be prescribed by a control signal, wherein the circuit comprises a channel code encoder whereby code words of a channel code can be generated and a transcriber, whereby code words of the channel code can be transcribed into the control signal of the L?1 single or double commutation circuits, and a method for generating a true, circuit-specific and time-invariant random number by means of a matrix of L?K delay elements, L?1 single or double commutation circuits, a single or double

Abstract: A method for generating random numbers in which oscillating digital output signals of unequal or equal periodicity are generated by at least two ring oscillators, an external parity signal representing a logical state being generated when an odd number of the output signals take on a specified logical state, the external parity signal being fed back to an external parity input of each of the respective ring oscillators. Also, a random number generator having at least two ring oscillators made up of independently freewnning inverter chains with feedback having an odd number of series-connected inverters that generate oscillating digital output signals of unequal or equal periodicity, and having first panty signal generating mechanisms that generate an external parity signal representing a logical state when an odd number of the output signals take on a specified logical state.

Abstract: The invention relates to a method for generating random numbers in which oscillating digital output signals (A1, A2, . . . , AL) of unequal or equal periodicity are generated by at least two ring oscillators (32, 33, 34), an external parity signal (PS) representing a logical state (“0,” “1”) being generated when an odd number of the output signals (A1, A2, . . . , AL) take on a specified logical state (“1”). According to the invention, the external parity signal (PS) is fed back to an external parity input (36, 37, 38) of each of the respective ring oscillators (32, 33, 34). The invention further relates to a random number generator having at least two ring oscillators (32, 33, 34), made up in particular of independently free-running inverter chains with feedback having an odd number (K) of series-connected inverters (inv1,2, inv2,1, inv3,1, . . . , invi,j, . . . , invL,KL) that generate oscillating digital output signals (A1, A2, . . .