Abstract: A system for sharing computer resources comprises a node in a first computer grid, and one or more processing units adapted to instantiate an information path from said node to computing resources of a plurality of other grids, said information path configured as hierarchical rings of trust such that each grid of said plurality of other grids is assigned to one of a plurality of hierarchical trust levels.

Abstract: A system for switching between computer hardware configurations is provided. The system may include multiple processors and an operating system that facilitates switching between a lock step or fail-over processing operation configuration and a multiprocessor operation configuration.

Abstract: A system and method for memory failure recovery is disclosed. The method discloses the steps of maintaining a predetermined number of duplicate and primary processes; keeping the processes in synchronization; managing the processes so that a single process image is presented to an external environment; detecting a computer system exception which affects one of the processes; and terminating the affected process. The system discloses, a primary process memory space which hosts a primary process; a duplicate process memory space which hosts a duplicate process corresponding to the primary process; a synchronization buffer which keeps the duplicate process in synchronization with the primary process; a processor which generates an exception signal in response to detection of a memory failure condition which affects the primary process; and an operating system which receives the exception signal, terminates the affected primary process, and maintains a predetermined number of primary and duplicate processes.

Abstract: A locking system for securing an electronic device includes a locking signal transmitter anchored at a physical location away from the electronic device to transmit a locking signal. A receiver resides in the electronic device to receive the locking signal. A controller is coupled to the receiver and circuitry of the electronic device to virtually lock the electronic device at its location when the receiver keeps receiving the locking signal, and to disable the electronic device from being accessed after the receiver has stopped receiving the locking signal for a predetermined time period. The locking does not have any effect on functioning of the electronic device as long as the locking signal is received. When the device is unlocked, failure of the device lock to receive the locking signal also does not have any effect on the electronic device.

Abstract: A system for switching between computer hardware configurations is provided. The system may include multiple processors and an operating system that facilitates switching between a lock step or fail-over processing operation configuration and a multiprocessor operation configuration.

Abstract: A locking system for securing an electronic device includes a locking signal transmitter anchored at a physical location away from the electronic device to transmit a locking signal. A receiver resides in the electronic device to receive the locking signal. A controller is coupled to the receiver and circuitry of the electronic device to virtually lock the electronic device at its location when the receiver keeps receiving the locking signal, and to disable the electronic device from being accessed after the receiver has stopped receiving the locking signal for a predetermined time period. The locking does not have any effect on functioning of the electronic device as long as the locking signal is received. When the device is unlocked, failure of the device lock to receive the locking signal also does not have any effect on the electronic device.

Abstract: A system and method for memory failure recovery is disclosed. The method discloses the steps of maintaining a predetermined number of duplicate and primary processes; keeping the processes in synchronization; managing the processes so that a single process image is presented to an external environment; detecting a computer system exception which affects one of the processes; and terminating the affected process. The system discloses, a primary process memory space which hosts a primary process; a duplicate process memory space which hosts a duplicate process corresponding to the primary process; a synchronization buffer which keeps the duplicate process in synchronization with the primary process; a processor which generates an exception signal in response to detection of a memory failure condition which affects the primary process; and an operating system which receives the exception signal, terminates the affected primary process, and maintains a predetermined number of primary and duplicate processes.

Abstract: The present invention is a system and method for recovering from memory failures in computer systems. The method of the present invention includes the steps of: identifying a predetermined instruction sequence; monitoring for memory access errors in response to the request; logging a memory access error in an error logging register; polling the register for any logged memory access error during execution of the instruction sequence; and raising exceptions, if the memory access error is logged. Within the system of the present invention, memory access errors are stored in an error logging register, machine check abort handles are masked, and memory controllers are under full control of the software so that memory access errors can be intercepted and responded to without necessitating a system reboot or application restart. The present invention is particularly applicable to O/S code which can not otherwise recover from memory errors except by rebooting.