Abstract: The present disclosure provides a secure booting method, apparatus, device for an embedded program and a storage medium. The method includes: when a boot program is running, acquiring data of an application program, including signature information, public key information, parameter information, encrypted data, and a digital check code; performing signature check according to the signature information; performing integrity check according to the digital check code if the signature check passes; and performing data decryption according to the public key information and the parameter information if the integrity check passes. The present disclosure may improve information security.

Abstract: Provided are a data communication method and system, an electronic device, a chip and a storage medium. The data communication method includes: establishing a wireless communication connection with a first receiving terminal, and notifying the connection information to a second receiving terminal. The connection information includes information of a communication channel for performing wireless communication between the transmitting terminal and the first receiving terminal. The connection information is used to instruct the at least one second receiving terminal to monitor communication data in the communication channel. When the at least one second receiving terminal knows after monitoring the communication data, data required to be transmitted to the first receiving terminal is transmitted to the communication channel.

Abstract: A method for measuring a power-on reset time includes: detecting a power supply pin voltage of a chip, and recording a time point at which the power supply pin voltage reaches a preset voltage as a first time point; detecting an output signal of a preset pin of the chip, and recording a time point at which the preset pin completes a pulse output for a first time after the chip is powered on, as a second time point, and recording a time point the preset pin completes a pulse output for a second time, as a third time point; wherein widths of the pulse output for the first time and for the second time are the same; and computing the power-on reset time of the chip according to the first time point, the second time point and the third time point.

Abstract: Provided are a data communication method and system, an electronic device, a chip and a storage medium. The data communication method includes: establishing a wireless communication connection with a first receiving terminal, and notifying the connection information to a second receiving terminal. The connection information includes information of a communication channel for performing wireless communication between the transmitting terminal and the first receiving terminal. The connection information is used to instruct the at least one second receiving terminal to monitor communication data in the communication channel. When the at least one second receiving terminal knows after monitoring the communication data, data required to be transmitted to the first receiving terminal is transmitted to the communication channel.

Abstract: Provided are a data communication method and system, an electronic device, a chip and a storage medium. The data communication method includes: establishing a wireless communication connection with a preset first receiving terminal, and notifying the connection information to a second receiving terminal. The connection information includes information of a communication channel for performing wireless communication between the transmitting terminal and the first receiving terminal. The connection information is used to instruct the second receiving terminal to monitor communication data in the communication channel. When the second receiving terminal knows after monitoring the communication data, data required to be transmitted to the first receiving terminal is transmitted to the communication channel.

Abstract: The present disclosure provides a secure booting method, apparatus, device for an embedded program and a storage medium. The method includes: when a boot program is running, acquiring data of an application program, including signature information, public key information, parameter information, encrypted data, and a digital check code; performing signature check according to the signature information; performing integrity check according to the digital check code if the signature check passes; and performing data decryption according to the public key information and the parameter information if the integrity check passes. The present disclosure may improve information security.

Abstract: A method of processing deadlock of an I2C bus, an electronic device and a communication system are disclosed, where the I2C bus is configured for communication between a master device and a slave device, and the method includes: setting, by the mater device, a serial data line SDA of the I2C bus to be in a floating state when the master device determines the I2C bus is in the deadlock state; and controlling, by the master device, a serial clock line SCL in the I2C bus to successively output at least n+1 clocks after the master device sets the SDA to be in a floating state, where the at least n+1 clocks are used to control the SDA by the slave device to proceed to perform data transmission, and n is a data bit width of the I2C bus.

Abstract: A method for measuring a power-on reset time includes: detecting a power supply pin voltage of a chip, and recording a time point at which the power supply pin voltage reaches a preset voltage as a first time point; detecting an output signal of a preset pin of the chip, and recording a time point at which the preset pin completes a pulse output for a first time after the chip is powered on, as a second time point, and recording a time point the preset pin completes a pulse output for a second time, as a third time point; wherein widths of the pulse output for the first time and for the second time are the same; and computing the power-on reset time of the chip according to the first time point, the second time point and the third time point.