Patents by Inventor Delphine Aime

Delphine Aime has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Forming of silicide areas in a semiconductor device
    Patent number: 7947583
    Abstract: An embodiment of a method for forming silicide areas of different thicknesses in a device comprising first and second silicon areas, comprising the steps of: implanting antimony or aluminum in the upper portion of the first silicon areas; covering the silicon areas with a metallic material; and heating the device to transform all or part of the silicon areas into silicide areas, whereby the silicide areas formed at the level of the first silicon areas are thinner than the silicide areas formed at the level of the second silicon areas.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: May 24, 2011
    Assignee: STMicroelectronics, SA
    Inventors: Delphine Aime, Benoît Froment
  • MOS transistor with fully silicided gate
    Patent number: 7638427
    Abstract: An MOS transistor with a fully silicided gate is produced by forming a silicide compound in the gate separately and independently of silicide portions located in source and drain zones of the transistor. To this end, the silicide portions of the source and drain zones are covered by substantially impermeable coatings. The coatings prevent the silicide portions of the source and drain zones from increasing in volume during separate and independent formation of the gate silicide compound. The silicide gate may thus be thicker than the silicide portions of the source and drain zones.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: December 29, 2009
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Benoît Froment, Delphine Aime
  • Forming of silicide areas in a semiconductor device
    Publication number: 20070099408
    Abstract: An embodiment of a method for forming silicide areas of different thicknesses in a device comprising first and second silicon areas, comprising the steps of: implanting antimony or aluminum in the upper portion of the first silicon areas; covering the silicon areas with a metallic material; and heating the device to transform all or part of the silicon areas into silicide areas, whereby the silicide areas formed at the level of the first silicon areas are thinner than the silicide areas formed at the level of the second silicon areas.
    Type: Application
    Filed: November 2, 2006
    Publication date: May 3, 2007
    Inventors: Delphine Aime, Benoit Froment
  • MOS transistor with fully silicided gate
    Publication number: 20060172492
    Abstract: An MOS transistor with a fully silicided gate is produced by forming a silicide compound in the gate separately and independently of silicide portions located in source and drain zones of the transistor. To this end, the silicide portions of the source and drain zones are covered by substantially impermeable coatings. The coatings prevent the silicide portions of the source and drain zones from increasing in volume during separate and independent formation of the gate silicide compound. The silicide gate may thus be thicker than the silicide portions of the source and drain zones.
    Type: Application
    Filed: January 10, 2006
    Publication date: August 3, 2006
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Benoit Froment, Delphine Aime