Abstract: The present application relates to a wind-resistant suspension bridge, including a bridge tower, a bridge body, a main rope, a suspension rope and a guardrail. The suspension bridge further includes a wind-resistant rope, one end of which is connected to the bridge tower and the other end of which is connected to the main rope. The wind-resistant rope, the main rope and the bridge tower form a substantially triangle. The contact point between the bridge tower and the main rope, the connection point between the wind-resistant rope and the main rope, and the connection point between the wind-resistant rope and the bridge tower form the three vertices of the substantially triangle.

Abstract: The present disclosure provides a FINFET device integrated with a TFET and its manufacturing method. Two end portions of the fin structure respectively form an N-type doped drain and a source which is consisted by a top P-type doped region and a bottom N-type doped region. As a result, the bottom N-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the surface of the sidewall of the fin structure form a MOS FINFET device, and the top P-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the top surface of the fin structure form the TFET device. The integration of the TFET and the FINFET is achieved, which decreases the cost.

Abstract: The present disclosure provides a FINFET device integrated with a TFET and its manufacturing method. Two end portions of the fin structure respectively form an N-type doped drain and a source which is consisted by a top P-type doped region and a bottom N-type doped region. As a result, the bottom N-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the surface of the sidewall of the fin structure form a MOS FINFET device, and the top P-type doped region of the source, the drain, the channel, the high-k dielectric layer and the gate structure on the top surface of the fin structure form the TFET device. The integration of the TFET and the FINFET is achieved, which decreases the cost.

Abstract: This invention involves a fabrication method of fast recovery diode, which includes following steps: growing a sacrificial oxide layer on a surface of an N? substrate; forming a P type doped field-limiting ring region on the substrate; forming a P type doped anode region on the substrate; removing the sacrificial oxide layer; annealing the substrate to form a PN junction; implanting oxygen into the surface of the substrate by ion implantation; annealing the substrate to form a silicon dioxide layer on the surface of the substrate; removing the silicon dioxide layer; forming an anode electrode and a cathode electrode of the fast recovery diode. The method eliminates the curved parts near the silicon surface of the profile of PN junction, decreases electric field intensity at the surface of the substrate, therefore increases the breakdown voltage and reliability of the fast recovery diode.

Abstract: This invention involves a fabrication method of fast recovery diode, which includes following steps: growing a sacrificial oxide layer on a surface of an N? substrate; forming a P type doped field-limiting ring region on the substrate; forming a P type doped anode region on the substrate; removing the sacrificial oxide layer; annealing the substrate to form a PN junction; implanting oxygen into the surface of the substrate by ion implantation; annealing the substrate to form a silicon dioxide layer on the surface of the substrate; removing the silicon dioxide layer; forming an anode electrode and a cathode electrode of the fast recovery diode. The method eliminates the curved parts near the silicon surface of the profile of PN junction, decreases electric field intensity at the surface of the substrate, therefore increases the breakdown voltage and reliability of the fast recovery diode.

Abstract: The present invention provides a guarding ring structure of a semiconductor high voltage device and the manufacturing method thereof. The guarding ring structure comprises a first N type monocrystalline silicon substrate (3), a second N type monocrystalline silicon substrate (8), a discontinuous oxide layer (2), a metal field plate (1), a device region (9), multiple P+ type diffusion rings (5) and an equipotential ring (4). The second N type monocrystalline silicon substrate (8) is a single N type crystalline layer epitaxially formed on the first N type monocrystalline silicon substrate (3) and has lower doping concentration than the first N type monocrystalline silicon substrate (3). N type diffusion rings (6) are embedded in the inner side of the P+ type diffusion rings (5) and are fully depleted at zero bias voltage. The guarding ring structure can achieve the same withstand voltage with less area and design time.

Abstract: The present invention provides a guarding ring structure of a semiconductor high voltage device and the manufacturing method thereof The guarding ring structure comprises a first N type monocrystalline silicon substrate (3), a second N type monocrystalline silicon substrate (8), a discontinuous oxide layer (2), a metal field plate (1), a device region (9), multiple P+ type diffusion rings (5) and an equipotential ring (4). The second N type monocrystalline silicon substrate (8) is a single N type crystalline layer epitaxially formed on the first N type monocrystalline silicon substrate (3) and has lower doping concentration than the first N type monocrystalline silicon substrate (3). N type diffusion rings (6) are embedded in the inner side of the P+ type diffusion rings (5) and are fully depleted at zero bias voltage. The guarding ring structure can achieve the same withstand voltage with less area and design time.