Patents by Inventor Denis Cousineau

Denis Cousineau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103479
    Abstract: The present invention is related to a method for checking correctness of a PLC program described by functional specifications typically presented as a timing chart. The method comprises: —S1: translating the PLC program into a model, —S2: translating the timing chart and integrating said timing chart into the model, —S3: computing abstract semantics, to infer information eventually missing in the timing chart, —S4: predicating transformation, and deducing properties to be verified, from the model and from predefined PLC formalized instructions, in order to satisfy timing chart verification, —S5: solving and checking whether said properties are always verified, or providing counter-examples, —S6: translating said counter-examples into PLC model errors events initial configurations, —S7: simulating execution, —S8: assembling states and events executions variables values, and —S9: translating back to PLC program.
    Type: Application
    Filed: December 14, 2021
    Publication date: March 28, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Denis COUSINEAU, Florian FAISSOLE, David MENTRE, Hiroaki INOUE
  • Patent number: 11755463
    Abstract: A method (100) to generate test suite for a source-code (1). The method comprises: a) implementing a structural analysis (101) of said source-code (1) to obtain a completed source-code (1) including: —parsing the source-code, —addition of annotations defining tests objectives, —generation of stubs; b) implementing at least one semantic analysis algorithm including categorizing each set of tests objectives as satisfied, impossible to satisfy or unsatisfied; c) feeding a first list (11) with satisfied test cases; d) feeding a second list (21) with test objectives impossible to satisfy, e) implementing at least one mathematical optimization algorithm (103) on parts corresponding to unsatisfied test objectives; —identifying test cases (113) that satisfy at least a part of said test objectives, —feeding said first list of set of test cases with them, —categorizing said test objectives as satisfied; f) providing a test suite comprising the two lists.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: September 12, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: David Mentre, Denis Cousineau, Eric Lavillonniere
  • Publication number: 20230030253
    Abstract: It is disclosed a PLC Program analysis method where a program is translated into a program model in a logical framework, from which properties are determined. Said properties coupled with interlocking properties are verified by an automated solver. If contraposition of a property is satisfiable, counter-examples representative of model's inputs and internal memory values is provided. Counter-examples are translated into error initial configurations of said model. Execution of the model is simulated with said model error initial configurations, and error intermediary configurations of said model simulation are recorded up to said property violation. Error initial and intermediary configurations of said original program are derived from error initial configurations of said model and error intermediary configurations of said model simulation and displayed. An apparatus for executing said method is provided.
    Type: Application
    Filed: December 23, 2020
    Publication date: February 2, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Denis COUSINEAU
  • Publication number: 20220137586
    Abstract: It is disclosed a PLC Program analysis method where a program (PROG) is translated (TRANS) into a model (MOD) in a logical framework, from which properties (Prop) are determined. Said properties coupled with user specifications (IntProp) are verified by an automated solver (SMT). If contraposition of a property (Prop) is satisfiable, counter-examples (PROOF NOK) representative of model inputs and internal memory values is provided. Counter-examples (PROOF NOK) are translated into error initial configurations (IniConf) of said model. Execution of the model is simulated (EXE) with said model error initial configurations (IniConf), and error intermediary configurations (AST-IntConf) of said model simulation are recorded up to said property violation. Error initial and intermediary configurations (Lad-IniConf, Lad-IntConf) of said original program (PROG) are derived from error initial configurations (IniConf) of said model and error intermediary configurations (AST-IntConf) of said model simulation and displayed.
    Type: Application
    Filed: February 7, 2020
    Publication date: May 5, 2022
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Denis COUSINEAU
  • Publication number: 20200379888
    Abstract: A method (100) to generate test suite for a source-code (1). The method comprises: a) implementing a structural analysis (101) of said source-code (1) to obtain a completed source-code (1) including: —parsing the source-code, —addition of annotations defining tests objectives, —generation of stubs; b) implementing at least one semantic analysis algorithm including categorizing each set of tests objectives as satisfied, impossible to satisfy or unsatisfied; c) feeding a first list (11) with satisfied test cases; d) feeding a second list (21) with test objectives impossible to satisfy, e) implementing at least one mathematical optimization algorithm (103) on parts corresponding to unsatisfied test objectives; —identifying test cases (113) that satisfy at least a part of said test objectives, —feeding said first list of set of test cases with them, —categorizing said test objectives as satisfied; f) providing a test suite comprising the two lists.
    Type: Application
    Filed: March 7, 2019
    Publication date: December 3, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: David MENTRE, Denis COUSINEAU, Eric LAVILLONNIERE
  • Publication number: 20080017008
    Abstract: A band saw blade guide wear pad includes a slab having a first contact face of wear resistant material, a second contact face of wear resistant material opposed to the first contact face, and a peripheral edge. When the wear resistant material on the first contact face becomes worn, the slab is inverted and use of the slab continues until the wear resistant material on the second contact face also becomes worn. Variations of wear pad holders adapted for use with the wear pads are also described.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 24, 2008
    Inventors: Clayton Brenton, Denis Cousineau