Abstract: A binary-to-bipolar converter converts two binary signals into positive and negative bipolar pulses alternately corresponding to a "1" logic state of two binary signals. The bipolar pulses are defined by the low output impedance states of two transfer gates. The main object of the invention is to reduce the transient trailing of the rear edges in the bipolar pulses. This can be obtained by delaying the drop from the low impedance state to the high output impedance state by means delaying control signals on the transfer gates, or by an integrator circuit applying calibrated pulses onto the output of the transfer gates, in response to the rear edges of the "1" logic states in the binary signals. The converter also calibrates the rise times of the bipolar pulses and allow the use of CMOS circuits upstream of the converter.

Abstract: A method of receiving a codirectional interface digital signal coded in bipolar form, each data bit being represented by means of four bits (1,1,0,0) for a binary "1" and (1,0,1,0) for a binary "0", a polarity alternation being effected every bit with a violation of polarity at each octet, comprising the steps of: separating the interface signal into its positive and negative components; producing a rectified signal from the said components; deriving from the rectified signal a bit timing signal; deriving the decoded data signal from the rectified signal and the timing signal; deriving from said components a signal representing the alternations of polarity; deriving from this latter signal and from the bit timing signal an octet timing signal; and comparing in phase the bit timing signal and the polarity alternation signal, a pulse for rephasing the bit timing signal being produced when the states of these two signals do not coincide at the time of a polarity alternation.