Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a sidewall in a porous low-k dielectric layer that overlies a semiconductor substrate using a plurality of discontinuous etching treatments. Exposed portions of the sidewall are progressively sealed interposingly between the discontinuous etching treatments to form a sealed sidewall. The sealed sidewall defines a trench in the porous low-k dielectric layer.

Abstract: Methods are provided for fabricating integrated circuits. In accordance with one embodiment an integrated circuit feature is formed overlying a semiconductor substrate. A layer of low dielectric constant insulator is deposited overlying the circuit feature and is subjected to a plasma environment. Properties of the low dielectric constant material are measured by scatterometry. The low dielectric constant material is heated to drive off adsorbed water and then the properties of the material are remeasured by scatterometry. The results of the measuring and the remeasuring are compared to determine whether the low dielectric constant material was damaged by the plasma environment.

Abstract: An improved reaction chamber cleaning process is provided for removing water residues that makes use of noble-gas plasma reactions. The method is easy applicable and may be combined with standard cleaning procedure. A noble-gas plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules to form electronically excited oxygen atoms is used to remove the adsorbed water.

Abstract: A method is provided for producing a porogen-residue-free ultra low-k film with porosity higher than 50% and a high elastic modulus above 5 GPa. The method starts with depositing a SiCOH film using Plasma Enhanced Chemical Vapor Deposition (PE-CVD) or Chemical Vapor Deposition (CVD) onto a substrate and then first Performing an atomic hydrogen treatment at elevated wafer temperature in the range of 200° C. up to 350° C. to remove all the porogens and then performing a UV assisted thermal curing step.

Abstract: One inventive aspect relates to a method of selective epitaxial growth of source/drain (S/D) areas. The method includes providing a substrate having a first and a second substrate area, the first area including at least one gate stack. The method includes applying a poly-Si or poly-SiGe top layer on the substrate, the top layer being etchable with the same etch chemistry as the substrate. The method includes removing the poly-Si or poly-SiGe top layer from the first area selectively towards the poly-Si or poly-SiGe top layer in the second area. The method includes removing simultaneously the poly-Si or poly-SiGe top layer on the second area and at least a part of the substrate in the S/D areas of the first area selectively to the gate stack. The method includes performing a selective epitaxial growth of S/D areas in the first area.

Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.

Abstract: A method is disclosed for the selective removal of rare earth based high-k materials such as rare earth scandate high-k materials (e.g. DyScO3) over silicon or silicon dioxide. As an example Dy and Sc comprising high-k materials are used as a high-k material in gate stacks of a semiconductor device. The selective removal and etch of this high-k material is very difficult since Dy and Sc (and their oxides) are difficult to etch. The etching could however be easily stopped on them. For patterning of the metal gates comprising TiN and TaN on top of rare earth based high-k layer a chlorine-containing gases (Cl2 and BCl3) can be used since titanium ant tantalum chlorides are volatile and reasonable selectivity to other material present on the wafer (Si, SiO2) can be obtained. The Dy and Sc chlorides are not volatile, but they are water soluble.

Abstract: An improved reaction chamber cleaning process is provided for removing water residues that makes use of noble-gas plasma reactions. The method is easy applicable and may be combined with standard cleaning procedure. A noble-gas plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules to form electronically excited oxygen atoms is used to remove the adsorbed water.

Abstract: A method is provided for the patterning of a stack comprising elements that do not form volatile compounds during conventional reactive ion etching. More specifically the element(s) are Lanthanide elements such as Ytterbium (Yb) and the patterning preferably relates to the dry etching of silicon and/or germanium comprising structures (e.g. gates) doped with a Lanthanide e.g. Ytterbium (Yb doped gates). In case the silicon and/or germanium comprising structure is a gate electrode the silicon and/or germanium is doped with a Lanthanide (e.g. Yb) for modeling the work function of a gate electrode.

Abstract: A method is disclosed for the selective removal of rare earth based high-k materials such as rare earth scandate high-k materials (e.g. DyScO3) over silicon or silicon dioxide. As an example Dy and Sc comprising high-k materials are used as a high-k material in gate stacks of a semiconductor device. The selective removal and etch of this high-k material is very difficult since Dy and Sc (and their oxides) are difficult to etch. The etching could however be easily stopped on them. For patterning of the metal gates comprising TiN and TaN on top of rare earth based high-k layer a chlorine-containing gases (Cl2 and BCl3) can be used since titanium ant tantalum chlorides are volatile and reasonable selectivity to other material present on the wafer (Si, SiO2) can be obtained. The Dy and Sc chlorides are not volatile, but they are water soluble.

Abstract: A method is provided for the patterning of a stack comprising elements that do not form volatile compounds during conventional reactive ion etching. More specifically the element(s) are Lanthanide elements such as Ytterbium (Yb) and the patterning preferably relates to the dry etching of silicon and/or germanium comprising structures (e.g. gates) doped with a Lanthanide e.g. Ytterbium (Yb doped gates). In case the silicon and/or germanium comprising structure is a gate electrode the silicon and/or germanium is doped with a Lanthanide (e.g. Yb) for modeling the work function of a gate electrode.

Abstract: One inventive aspect relates to a method of selective epitaxial growth of source/drain (S/D) areas. The method comprises providing a substrate of semiconductor material, the substrate comprising a first substrate area and a second substrate area, the first area comprising at least one gate stack. The method further comprises applying at least a poly-Si or poly-SiGe top layer on the substrate, the top layer being etchable with the same etch chemistry as the substrate. The method further comprises removing the poly-Si or poly-SiGe top layer from the first area of the substrate selectively towards the poly-Si or poly-SiGe top layer in the second substrate area. The method further comprises removing simultaneously the poly-Si or poly-SiGe top layer on the second substrate area and at least a part of the substrate in the S/D areas of the first substrate area selectively to the at least one gate stack. The method further comprises performing a selective epitaxial growth of S/D areas in the first substrate area.

Abstract: A method for the selective removal of a high-k layer such as HfO2 over silicon or silicon dioxide is provided. More specifically, a method for etching high-k selectively over silicon and silicon dioxide and a plasma composition for performing the selective etch process is provided. Using a BCl3 plasma with well defined concentrations of nitrogen makes it possible to etch high-k with at a reasonable etch rate while silicon and silicon dioxide have an etch rate of almost zero. The BCl3 comprising plasmas have preferred additions of 10 up to 13% nitrogen. Adding a well defined concentration of nitrogen to the BCl3/N2 plasma gives the unexpected deposition of a Boron-Nitrogen (BxNy) comprising film onto the silicon and silicon dioxide which is not deposited onto the high-k material. Due to the deposition of the Boron-Nitrogen (BxNy) comprising film, the etch rate of silicon and silicon dioxide is dropped down to zero.

Abstract: A plasma composition and its use in a method for the dry etching of a stack of at least one material chemically too reactive towards the use of a Cl-based plasma are provided. Small amounts of nitrogen (5% up to 10%) can be added to a BCl3 comprising plasma and used in an anisotropical dry etching method whereby a passivation film is deposited onto the vertical sidewalls of stack etched for protecting the vertical sidewalls from lateral attack such that straight profiles can be obtained.

Abstract: Methods for sealing porous low-k dielectrics, and devices made thereby, are described, comprising treating the porous low-k dielectrics by atomic layer deposition so as to seal the pores. ALD reactants are chosen in part based on their size, such that they do not deeply penetrate the interconnected pore structures of the dielectrics.

Abstract: Methods for sealing porous low-k dielectrics, and devices made thereby, are described, comprising treating the porous low-k dielectrics by atomic layer deposition so as to seal the pores. ALD reactants are chosen in part based on their size, such that they do not deeply penetrate the interconnected pore structures of the dielectrics.

Abstract: A method and apparatus for evaluation of films, such as low-k thin films with nano-scale pores, are provided. The evaluation may include characterization of the pore structure, the characterization results in determining pore sizes, hence obtaining pore size data. Moreover, the characterization may result in a non-destructive evaluation of mechanical properties, in particular the Young's Modulus, or the effect of interfering physical & chemical factors such as Pore Killers. Further, in line monitoring or studying of pore structure porosity and pore size distribution (PSD) of low-k films and evaluation of the mechanical properties of porous low-k films simultaneously using the same set of experimental data is provided.

Abstract: The present invention concerns a method to produce a porous oxygen-silicon insulating layer comprising following steps:

Abstract: The present invention concerns a method to produce a porous oxygen-silicon insulating layer comprising following steps: applying a silicon oxygen layer to a substrate exposing the said substrate to a HF ambient.

Abstract: A method and apparatus for evaluation of films, such as low-k thin films with nano-scale pores, are provided. The evaluation may include characterization of the pore structure, the characterization results in determining pore sizes, hence obtaining pore size data. Moreover, the characterization may result in a non-destructive evaluation of mechanical properties, in particular the Young's Modulus. Further, in line monitoring or studying of pore structure porosity and pore size distribution (PSD) of low-K films and evaluation of the mechanical properties of porous low-k films simultaneously using the same set of experimental data is provided.