Patents by Inventor Denis Vassilevich Parfenov
Denis Vassilevich Parfenov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8824667Abstract: In one embodiment, an acoustic echo control (AEC) module receives an outgoing signal and an incoming signal, which, at various times, contains acoustic echo corresponding to the outgoing signal. The AEC module has a delay estimation block that estimates, in the time domain, the echo delay using an adaptive filtering technique. This delay estimation is used to align samples of the incoming signal having acoustic echo with the corresponding samples of the outgoing signal from which the acoustic echo originated. The AEC module determines whether or not samples of the incoming signal contain acoustic echo based on the aligned outgoing signal, and the determinations are applied to a hangover counter. The AEC module then suppresses acoustic echo in the incoming signal and adds comfort noise to the incoming signal. The amount of echo suppression performed is gradually increased or decreased based on comparisons of the counter to a hangover threshold.Type: GrantFiled: August 31, 2011Date of Patent: September 2, 2014Assignee: LSI CorporationInventors: Ivan Leonidovich Mazurenko, Dmitry Nikolaevich Babin, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko, Alexander Markovic
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Patent number: 8780983Abstract: A video transcoder for converting an encoded input video bit-stream having one spatial resolution into an encoded output video bit-stream having a lower spatial resolution, wherein learned statistics of intra-mode transcoding are used to constrain the search of intra modes for the output video bit-stream. The statistics of intra-mode transcoding can be gathered, e.g., by applying brute-force downsizing to a training set of video frames and then analyzing the observed intra-mode transcoding patterns to determine a transition-probability matrix for use during normal operation of the transcoder. The transition-probability matrix enables the transcoder to select appropriate intra modes for the output video bit-stream without performing a corresponding exhaustive full search, which advantageously reduces the computational complexity and processor load compared to those of a comparably performing prior-art video transcoder.Type: GrantFiled: June 20, 2011Date of Patent: July 15, 2014Assignee: LSI CorporationInventors: Ivan Leonidovich Mazurenko, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko
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Patent number: 8731068Abstract: A video transcoder for converting a compressed input video bit-stream having one spatial resolution into a compressed output video bit-stream having a different spatial resolution in a manner that enables the transcoder to dynamically change the amount of computational resources allocated to the conversion process. In one embodiment, the video transcoder has a plurality of configurable processing paths whose configuration determines the amount of allocated computational resources. Exemplary processing-path configuration changes may include, but are not limited to engaging or disengaging a processing path, redirecting a data flow from flowing through one processing path to flowing through another processing path, and attaching or detaching one or more processing modules to an engaged processing path.Type: GrantFiled: March 23, 2011Date of Patent: May 20, 2014Assignee: LSI CorporationInventors: Denis Vassilevich Parfenov, Pavel Aleksandrovich Aliseychik, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Ivan Leonidovich Mazurenko, Denis Vladimirovich Parkhomenko
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Patent number: 8711941Abstract: A video transcoder for converting an encoded input video bit-stream having one spatial resolution into an encoded output video bit-stream having a lower spatial resolution, wherein motion-vector dispersion observed at the higher spatial resolution is quantified and used to configure the motion-vector search at the lower spatial resolution. For example, for video-frame areas characterized by relatively low motion-vector dispersion values, the motion-vector search may be performed over a relatively small vector space and with the use of fewer search patterns and/or hierarchical search levels. These constraints enable the transcoder to find appropriate motion vectors for inter-prediction coding without having to perform an exhaustive motion-vector search for these video-frame areas, which advantageously reduces the computational complexity and processor load compared to those of a comparably performing prior-art video transcoder.Type: GrantFiled: June 21, 2011Date of Patent: April 29, 2014Assignee: LSI CorporationInventors: Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Ivan Leonidovich Mazurenko, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko
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Patent number: 8515055Abstract: An adaptive filter configured to use multiple algorithm species that differ in the quality of echo suppression and respective burdens imposed on the computational resources of the host communication device. Depending on the available computational budget, the adaptive filter selects an algorithm species that, while supporting a relatively high quality of echo suppression, involves a relatively low risk of overwhelming the computational resources. The adaptive filter monitors changes in the available computational budget and, if appropriate or necessary, can change the algorithm species to maintain a quality of echo suppression that is optimal for the current computational budget. If a change of the algorithm species is initiated, then at least a portion of internal algorithm data from the previously running algorithm species might be transferred for use in the subsequent algorithm species.Type: GrantFiled: October 31, 2008Date of Patent: August 20, 2013Assignee: LSI CorporationInventors: Ivan Leonidovich Mazurenko, Stanislav Vladimirovich Aleshin, Dmitry Nikolaevich Babin, Ilya Viktorovich Lyalin, Andrey Anatolevich Nikitin, Denis Vassilevich Parfenov
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Patent number: 8447988Abstract: In certain embodiments, a digital signal processor (DSP) has multiple arithmetic logic units and a register module. The DSP is adapted to generate a message digest H from a message M in accordance with the SHA-1 standard, where M includes N blocks M(i), i=1, . . . , N, and the processing of each block M(i) includes t iterations of processing words of message schedule {Wt}. In each iteration possible, the DSP uses free operations to precalculate Wt and working variable values for use in the next iteration. In addition, in each iteration possible, the DSP rotates the registers associated with particular working variables to reduce operations that merely copy unchanged values from one register to another.Type: GrantFiled: September 16, 2009Date of Patent: May 21, 2013Assignee: LSI CorporationInventors: Dmitriy Vladimirovich Alekseev, Alexei Vladimirovich Galatenko, Ilya Viktorovich Lyalin, Alexander Markovic, Denis Vassilevich Parfenov
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Publication number: 20130028317Abstract: A search method for identifying an intra mode that can produce acceptable video-encoding quality for a pixel block while striking a proper balance between the quality and processor load. In a representative embodiment, the search method relies on a set of mode-selection rules for iteratively identifying candidate intra modes. Each identified candidate is evaluated based on a comparison of its sum of absolute differences (SAD) with the smallest SAD in the set of the previously identified candidates. The mode-selection rules use the comparison results as conditions that efficiently guide the search method toward an intra mode that is suitable for encoding the pixel block with acceptable video quality. On average, a representative embodiment of the search method disclosed herein is advantageously capable of finding a suitable intra mode in fewer iterations than a comparable prior-art search method.Type: ApplicationFiled: February 10, 2012Publication date: January 31, 2013Applicant: LSI CORPORATIONInventors: Denis Vassilevich Parfenov, Ivan Leonidovich Mazurenko, Aleksey Alexandrovich Letunovskiy, Pavel Aleksandrovich Aliseychik, Denis Vladimirovich Parkhomenko
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Publication number: 20120201370Abstract: In one embodiment, an acoustic echo control (AEC) module receives an outgoing signal and an incoming signal, which, at various times, contains acoustic echo corresponding to the outgoing signal. The AEC module has a delay estimation block that estimates, in the time domain, the echo delay using an adaptive filtering technique. This delay estimation is used to align samples of the incoming signal having acoustic echo with the corresponding samples of the outgoing signal from which the acoustic echo originated. The AEC module determines whether or not samples of the incoming signal contain acoustic echo based on the aligned outgoing signal, and the determinations are applied to a hangover counter. The AEC module then suppresses acoustic echo in the incoming signal and adds comfort noise to the incoming signal. The amount of echo suppression performed is gradually increased or decreased based on comparisons of the counter to a hangover threshold.Type: ApplicationFiled: August 31, 2011Publication date: August 9, 2012Applicant: LSI CorporationInventors: Ivan Leonidovich Mazurenko, Dmitry Nikolaevich Babin, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko, Alexander Markovic
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Publication number: 20120166773Abstract: In certain embodiments, a digital signal processor (DSP) has multiple arithmetic logic units and a register module. The DSP is adapted to generate a message digest H from a message M in accordance with the SHA-1 standard, where M includes N blocks M(i), i=1, . . . , N, and the processing of each block M(i) includes t iterations of processing words of message schedule {Wt}. In each iteration possible, the DSP uses free operations to precalculate Wt and working variable values for use in the next iteration. In addition, in each iteration possible, the DSP rotates the registers associated with particular working variables to reduce operations that merely copy unchanged values from one register to another.Type: ApplicationFiled: September 16, 2009Publication date: June 28, 2012Applicant: LSI CORPORATIONInventors: Dmitriy Vladimirovich Alekseev, Alexei Vladimirovich Galatenko, Ilya Viktorovich Lyalin, Alexander Markovic, Denis Vassilevich Parfenov
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Publication number: 20120106642Abstract: A video transcoder for converting an encoded input video bit-stream having one spatial resolution into an encoded output video bit-stream having a lower spatial resolution, wherein motion-vector dispersion observed at the higher spatial resolution is quantified and used to configure the motion-vector search at the lower spatial resolution. For example, for video-frame areas characterized by relatively low motion-vector dispersion values, the motion-vector search may be performed over a relatively small vector space and with the use of fewer search patterns and/or hierarchical search levels. These constraints enable the transcoder to find appropriate motion vectors for inter-prediction coding without having to perform an exhaustive motion-vector search for these video-frame areas, which advantageously reduces the computational complexity and processor load compared to those of a comparably performing prior-art video transcoder.Type: ApplicationFiled: June 21, 2011Publication date: May 3, 2012Applicant: LSI CORPORATIONInventors: Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Ivan Leonidovich Mazurenko, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko
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Publication number: 20120082220Abstract: A video transcoder for converting an encoded input video bit-stream having one spatial resolution into an encoded output video bit-stream having a lower spatial resolution, wherein learned statistics of intra-mode transcoding are used to constrain the search of intra modes for the output video bit-stream. The statistics of intra-mode transcoding can be gathered, e.g., by applying brute-force downsizing to a training set of video frames and then analyzing the observed intra-mode transcoding patterns to determine a transition-probability matrix for use during normal operation of the transcoder. The transition-probability matrix enables the transcoder to select appropriate intra modes for the output video bit-stream without performing a corresponding exhaustive full search, which advantageously reduces the computational complexity and processor load compared to those of a comparably performing prior-art video transcoder.Type: ApplicationFiled: June 20, 2011Publication date: April 5, 2012Applicant: LSI CORPORATIONInventors: Ivan Leonidovich Mazurenko, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Denis Vassilevich Parfenov, Alexander Alexandrovich Petyushko
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Publication number: 20120051427Abstract: A video transcoder for converting a compressed input video bit-stream having one spatial resolution into a compressed output video bit-stream having a different spatial resolution using a plurality of resizing channels. The transcoder has a kernel that partially decodes the compressed input video bit-stream to generate partially decoded video data. The data segments corresponding to picture portions that have both intra- and inter-predicted blocks in close spatial proximity to one another are applied to a mixed-mode resizing channel that is specifically designed for processing such data segments. For each received data segment, the control logic of the channel selects, from a bank of pre-configured resizers, a resizer that is deemed to be most suitable for resizing the image portion represented by that data segment in a computationally efficient manner. The data segment is processed in the selected resizer to generate the corresponding resized-image data.Type: ApplicationFiled: March 23, 2011Publication date: March 1, 2012Applicant: LSI CORPORATIONInventors: Denis Vassilevich Parfenov, Pavel Aleksandrovich Aliseychik, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Ivan Leonidovich Mazurenko, Denis Vladimirovich Parkhomenko
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Publication number: 20120051440Abstract: A video transcoder for converting a compressed input video bit-stream having one spatial resolution into a compressed output video bit-stream having a different spatial resolution in a manner that enables the transcoder to dynamically change the amount of computational resources allocated to the conversion process. In one embodiment, the video transcoder has a plurality of configurable processing paths whose configuration determines the amount of allocated computational resources. Exemplary processing-path configuration changes may include, but are not limited to engaging or disengaging a processing path, redirecting a data flow from flowing through one processing path to flowing through another processing path, and attaching or detaching one or more processing modules to an engaged processing path.Type: ApplicationFiled: March 23, 2011Publication date: March 1, 2012Applicant: LSI CORPORATIONInventors: Denis Vassilevich Parfenov, Pavel Aleksandrovich Aliseychik, Aleksey Alexandrovich Letunovskiy, Alexander Markovic, Ivan Leonidovich Mazurenko, Denis Vladimirovich Parkhomenko
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Publication number: 20110033037Abstract: An adaptive filter configured to use multiple algorithm species that differ in the quality of echo suppression and respective burdens imposed on the computational resources of the host communication device. Depending on the available computational budget, the adaptive filter selects an algorithm species that, while supporting a relatively high quality of echo suppression, involves a relatively low risk of overwhelming the computational resources. The adaptive filter monitors changes in the available computational budget and, if appropriate or necessary, can change the algorithm species to maintain a quality of echo suppression that is optimal for the current computational budget. If a change of the algorithm species is initiated, then at least a portion of internal algorithm data from the previously running algorithm species might be transferred for use in the subsequent algorithm species.Type: ApplicationFiled: October 31, 2008Publication date: February 10, 2011Applicant: LSI CORPORATIONInventors: Ivan Leonidovich Mazurenko, Stanislav Vladimirovich Aleshin, Dmitry Nikolaevich Babin, Ilya Viktorovich Lyalin, Andrey Anatolevich Nikitin, Denis Vassilevich Parfenov