Abstract: An integrated circuit die has a transistor circuitry section for implementing information handling operations. Optical circuitry is within the single semiconductor die. The optical circuitry includes a laser transmitter and is operably coupled to the transistor circuitry section. The transistor circuitry section originates information. The optical circuitry transmits the information in a laser beam through a wave guide to the edge of the integrated circuit die.

Abstract: An integrated circuit die has a transistor circuitry section for implementing information handling operations. Optical circuitry is within the single semiconductor die. The optical circuitry includes a laser transmitter and is operably coupled to the transistor circuitry section. The transistor circuitry section originates information. The optical circuitry transmits the information in a laser beam through a wave guide to the edge of the integrated circuit die.

Abstract: A process for selectively plasma etching polycrystalline silicon or polysilicon in preference to silicon dioxide which minimizes the detrimental effect of carbon. It has been discovered that carbon from the plasma etch chemicals or from photoresist present interferes disadvantageously with the selective plasma etch of polysilicon as opposed to silicon dioxide. By heat treating and deep ultraviolet light treating the photoresist prior to the plasma etch step and by using non-carbon etch chemicals, this detrimental carbon effect can be reduced.

Abstract: A method for etching multi-layer structures particularly suited for patterning refractory metal silicide/polysilicon sandwiches. A first dry etch process is carried out in a first dry etch chamber and is selected to rapidly and anisotropically etch the uppermost layer, typically a refractory metal silicide. A second dry etch process is carried out in a second etch chamber and is selected to rapidly and anisotropically etch the underlying layer, typically polysilicon, while having a high selectivity to any material underlying the underlying layer. The first process is preferably a fluorine-chemistry process with low frequency RF energy and the substrate resting on the grounded electrode. The second process is preferrably a chlorine-chemistry process with high frequency RF energy and the substrate resting on the powered electrode.

Abstract: The disclosure relates to a plasma etch chemistry which allows a near perfectly anisotropic etch of silicon. A Cl-containing compound such as HCl has HBr added thereto, readily allowing the anisotropic etching of silicon. This is due to the low volatility of SiBr.sub.4. The silicon surface facing the discharge is subjected to ion bombardment, allowing the volatilization (etching) of silicon as a Si-Cl-Br compound. The Br which adsorbs on the sidewalls of the etched silicon passivates them from the etching. This new plasma etch chemistry yields a very smooth etched surface, and the etch rate is relatively insensitive to the electrical conductivity of the silicon.

Abstract: Direct Moat Isolation for VLSI integrated circuit structures is formed by growing oxide over the entire substrate area, and then cutting windows in the oxide, using an anisotropic polymer-free oxide etch, where moat regions are to be formed. To prevent polysilicon filamentation, gate patterning is performed with an extremely selective polysilicon etch. The combination of these processing steps permits a direct moat isolation device fabrication process which is insensitive to the oxide sidewall angle, increasing yield and permitting extremely compact isolation structures to be formed.