Patents by Inventor Dennis Carr

Dennis Carr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8225031
    Abstract: A memory apparatus enable operation which is adapted to environmental conditions. The memory apparatus includes a memory module that can store and incorporate environment-dependent optimal operating parameters. The memory module comprises a plurality of volatile memory devices and one or more non-volatile memory devices that store a plurality of environment-dependent device parameters for a device selected from the plurality of volatile memory devices. The stored parameters enable the selected device to function optimally in multiple environmental conditions.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: July 17, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Teddy Lee, Lidia Warnes, Dan Vu, Dennis Carr, Michael Bozich Calhoun
  • Publication number: 20120175814
    Abstract: A machine for and method of manufacturing concrete U-wall construction blocks, each having a front wall portion and a pair of stem portions extending from said front wall portion. The method involves providing a system of molding jacket panels, including a core molding assembly having a pair of inside stem jacket panels that are adjustably supportable in a substantially parallel manner during a molding process, and arranged is such a manner that the front wall portion is molded in downwardly facing direction toward a horizontal support surface and completely enclosed in one or more molding jacket panels. Before block molding operations, the thickness of the front wall portion of the U-wall construction block is set by determining the thickness of a front wall surface liner and installing the front wall surface forming liner within the system of molding jacket panels.
    Type: Application
    Filed: January 10, 2011
    Publication date: July 12, 2012
    Inventors: Raymond O'Neill, Dennis Carr
  • Patent number: 8018753
    Abstract: Memory devices and systems include a voltage sense line for addressing voltage tolerances across variable loadings. The memory devices and systems comprise a memory module connector with a first plurality of pins coupled to circuitry on a memory module, and a second plurality of pins coupled to power rails on the memory module that enable monitoring of the power rails from external to the memory module.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: September 13, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Dennis Carr, Michael Bozich Calhoun, Teddy Lee, Lidia Warnes, Dan Vu
  • Patent number: 7996602
    Abstract: A translator of an apparatus in an example selects one or more ranks of parallel memory devices from a plurality of available ranks of parallel memory devices in a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered and/or unbuffered DIMMs) through employment of a native fully buffered dual in-line memory module protocol (native FB-DIMM protocol).
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: August 9, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lidia Warnes, Teddy Lee, Ricardo Ernesto Espinoza-Ibarra, Dennis Carr, Michael Bozich Calhoun
  • Publication number: 20110102148
    Abstract: An apparatus comprises a shipping box containing an access area and a configurable electronic device. The configurable electronic device comprises an electrical connector accessible via the access area on the shipping box. The configurable electronic device also comprises a management module that receives electrical power via the electrical connector when a single external cable is mated to the electrical connector through the access area. The management module receives configuration information via the single external cable while the configurable electronic device is still in the shipping box and without having host logic in the configurable electronic device being powered up. In other embodiments, multiple configurable electronic devices can be reconfigured simultaneously and wirelessly by an external programming unit.
    Type: Application
    Filed: October 29, 2009
    Publication date: May 5, 2011
    Inventors: Thomas M. Laffey, Dick T. Fong, Dennis Carr, Kevin Boyum
  • Patent number: 7741867
    Abstract: Memory devices and systems incorporate on-die termination for signal lines. A memory device comprises an integrated circuit die. The integrated circuit die comprises a pair of input signal pins that supply a pair of input signals, and an on-die termination circuit coupled between the pair of input signal pins that differentially terminates the pair of input signals.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: June 22, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Dennis Carr, Lidia Warnes, Dan Vu, Teddy Lee, Michael Bozich Calhoun
  • Patent number: 7739441
    Abstract: A translator of an apparatus in an example communicatively interconnects a serial protocol bus that follows a native fully buffered dual in-line memory module protocol (native FB-DIMM protocol) and three or more parallel protocol memory module channels that comprise a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered and/or unbuffered DIMMs).
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: June 15, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Teddy Lee, Michael Bozich Calhoun, Dennis Carr, Ricardo Ernesto Espinoza-Ibarra, Lidia Warnes
  • Patent number: 7729126
    Abstract: A modular DIMM carrier and riser slot device includes a slot section having a slot configured to hold a plurality of memory device planars, a first latch disposed at a first end of the slot section and pivotably connected to the slot section and capable of securing a first end of the memory device planars; a second latch disposed at a second end of the slot section and pivotably connected to the slot section and capable of securing a second end of a first memory device planar, and a third latch pivotably connected to the slot section and disposed intermediate between the first and the second latches, the third latch capable of securing a second end of a second memory device planar. The slot section has an auxiliary slot section defined as an section between the second latch and the third latch.
    Type: Grant
    Filed: July 31, 2007
    Date of Patent: June 1, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Michael Bozich Calhoun, Dennis Carr, Ricardo Ernesto Espinoza-Ibarra, Teddy Lee, Lidia Warnes
  • Publication number: 20100109704
    Abstract: Memory devices and systems incorporate on-die termination for signal lines. A memory device comprises an integrated circuit die. The integrated circuit die comprises a pair of input signal pins that supply a pair of input signals, and an on-die termination circuit coupled between the pair of input signal pins that differentially terminates the pair of input signals.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Dennis Carr, Lidia Warnes, Dan Vu, Teddy Lee, Michael Bozich Calhoun
  • Publication number: 20100115180
    Abstract: A memory apparatus enable operation which is adapted to environmental conditions. The memory apparatus includes a memory module that can store and incorporate environment-dependent optimal operating parameters. The memory module comprises a plurality of volatile memory devices and one or more non-volatile memory devices that store a plurality of environment-dependent device parameters for a device selected from the plurality of volatile memory devices. The stored parameters enable the selected device to function optimally in multiple environmental conditions.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Teddy Lee, Lidia Wames, Dan Vu, Dennis Carr, Michael Bozich Calhoun
  • Publication number: 20100115179
    Abstract: Memory devices and systems include a voltage sense line for addressing voltage tolerances across variable loadings. The memory devices and systems comprise a memory module connector with a first plurality of pins coupled to circuitry on a memory module, and a second plurality of pins coupled to power rails on the memory module that enable monitoring of the power rails from external to the memory module.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Dennis Carr, Michael Bozich Calhoun, Teddy Lee, Lidia Wames, Dan Vu
  • Patent number: 7711887
    Abstract: A translator of an apparatus in an example employs a native fully buffered dual in-line memory module protocol (native FB-DIMM protocol) to write to a plurality of parallel protocol memory module channels that comprises a plurality of double data rate registered and/or unbuffered dual in-line memory modules (DDR registered and/or unbuffered DIMMs).
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: May 4, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Lidia Warnes, Michael Bozich Calhoun, Dennis Carr, Ricardo Ernesto Espinoza-Ibarra, Teddy Lee
  • Publication number: 20090035978
    Abstract: A modular DIMM carrier and riser slot device includes a slot section having a slot configured to hold a plurality of memory device planars, a first latch disposed at a first end of the slot section and pivotably connected to the slot section and capable of securing a first end of the memory device planars; a second latch disposed at a second end of the slot section and pivotably connected to the slot section and capable of securing a second end of a first memory device planar, and a third latch pivotably connected to the slot section and disposed intermediate between the first and the second latches, the third latch capable of securing a second end of a second memory device planar. The slot section has an auxiliary slot section defined as an section between the second latch and the third latch.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 5, 2009
    Inventors: Michael Bozich Calhoun, Dennis Carr, Ricardo Emesto Espinoza-Ibarra, Teddy Lee, Lidia Warnes
  • Publication number: 20090031078
    Abstract: A system, and a corresponding method, are used to implement rank sparing. The system includes a memory controller and one or more DIMM channels coupled to the memory controller, where each DIMM channel includes one or more DIMMS, and where each of the one or more DIMMs includes at least one rank of DRAM devices. The memory controller is loaded with programming to test the DIMMs to designate at least one specific rank of DRAM devices as a spare rank.
    Type: Application
    Filed: July 27, 2007
    Publication date: January 29, 2009
    Inventors: Lidia Warnes, Michael Bozich Calhoun, Dennis Carr, Teddy Lee, Dan Vu, Ricardo Ernesto Espinoza-Ibarra
  • Publication number: 20060207677
    Abstract: An automatic hoop forming machine comprising a wire decoiling and feeding element connected to a series of rollers designed to pull, take out some irregularities and partially impart a curve before said wire is fed on to a hoop guide roll of the desired diameter to form a hoop-shaped element. The ends are overlapped and welded prior to cutting. Any number of hoops may be formed automatically and are eminently useful as reinforcing members within cementitious materials used to make manholes, for example.
    Type: Application
    Filed: March 18, 2005
    Publication date: September 21, 2006
    Inventor: Dennis Carr
  • Patent number: D422788
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: April 18, 2000
    Inventor: Dennis Carr