Patents by Inventor Dennis Edward Dudeck

Dennis Edward Dudeck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device with area efficient power gating circuitry
    Patent number: 8462562
    Abstract: A memory device comprises a memory block, a power gating transistor, and control circuitry. The memory block includes at least one memory cell comprising a storage element electrically connected to a source potential line, a drive strength of the storage element being a function of a voltage level on the source potential line. The power gating transistor, in turn, is connected between the source potential line and a voltage source. The control circuitry is operative to configure the power gating transistor to electrically connect the source potential line to the voltage source while the memory block is in a first mode, and to clamp the source potential line at a voltage different from that of the voltage source when the memory block is in a second mode.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: June 11, 2013
    Assignee: LSI Corporation
    Inventors: Ankur Goel, Donald Albert Evans, Dennis Edward Dudeck, Richard John Stephani, Ronald James Wozniak, Dharmendra Kumar Rai, Rasoju Veerabadra Chary, Jeffrey Charles Herbert
  • MEMORY DEVICE WITH AREA EFFICIENT POWER GATING CIRCUITRY
    Publication number: 20130128676
    Abstract: A memory device comprises a memory block, a power gating transistor, and control circuitry. The memory block includes at least one memory cell comprising a storage element electrically connected to a source potential line, a drive strength of the storage element being a function of a voltage level on the source potential line. The power gating transistor, in turn, is connected between the source potential line and a voltage source. The control circuitry is operative to configure the power gating transistor to electrically connect the source potential line to the voltage source while the memory block is in a first mode, and to clamp the source potential line at a voltage different from that of the voltage source when the memory block is in a second mode.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: LSI CORPORATION
    Inventors: Ankur Goel, Donald Albert Evans, Dennis Edward Dudeck, Richard John Stephani, Ronald James Wozniak, Dharmendra Kumar Rai, Rasoju Veerabadra Chary, Jeffrey Charles Herbert