Abstract: A semiconductor heterostructure device includes a middle layer including an inner conducting channel and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region. The DHCBR includes a first depleting impurity specie including a Column II acceptor, and a second depleting impurity comprising oxygen which increases a depletion of the DHCBR so that the DHCBR forces current to flow into the conducting channel during electrical biasing under normal operation of the semiconductor heterostructure device.

Abstract: A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.

Abstract: A semiconductor vertical light source includes upper and lower minors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper minor. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower minor. The outer current blocking region provides a PNPN current blocking region that includes the upper minor or a p-type layer, first doped region, second doped region, and lower minor or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor device includes an upper and lower mirror. At least one active region for light generation is between the upper and lower mirror. At least one cavity spacer layer is between at least one of the upper and lower mirror and the active region. The device includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) including a depleting impurity is within the outer current blocking region of ?1 of the upper mirror, lower mirror, and the first active region. A middle layer including a conducting channel is within the inner mode confinement region that is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor heterostructure device includes a middle layer including an inner conducting channel and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region. The DHCBR includes a first depleting impurity specie including a Column II acceptor, and a second depleting impurity comprising oxygen which increases a depletion of the DHCBR so that the DHCBR forces current to flow into the conducting channel during electrical biasing under normal operation of the semiconductor heterostructure device.

Abstract: A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor device includes an upper and lower mirror. At least one active region for light generation is between the upper and lower mirror. At least one cavity spacer layer is between at least one of the upper and lower mirror and the active region. The device includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) including a depleting impurity is within the outer current blocking region of ?1 of the upper mirror, lower mirror, and the first active region. A middle layer including a conducting channel is within the inner mode confinement region that is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.

Abstract: A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.

Abstract: A semiconductor vertical light source includes an upper mirror and a lower mirror. An active region is between the upper and lower mirror. The light source includes an inner mode confinement region and outer current blocking region. The outer current blocking region includes a common epitaxial layer that includes an epitaxially regrown interface which is between the active region and upper mirror, and a conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors is between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer.

Abstract: A semiconductor device includes an upper and lower mirror. At least one active region for light generation is between the upper and lower mirror. At least one cavity spacer layer is between at least one of the upper and lower mirror and the active region. The device includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) including a depleting impurity is within the outer current blocking region of ?1 of the upper mirror, lower mirror, and the first active region. A middle layer including a conducting channel is within the inner mode confinement region that is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during normal operation of the light source.

Abstract: A semiconductor vertical light source includes an upper mirror and a lower mirror. An active region is between the upper and lower mirror. The light source includes an inner mode confinement region and outer current blocking region. The outer current blocking region includes a common epitaxial layer that includes an epitaxially regrown interface which is between the active region and upper mirror, and a conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors is between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer.

Abstract: A semiconductor vertical resonant cavity light source includes an upper mirror and a lower mirror that define a vertical resonant cavity. A first active region is within the vertical resonant cavity for light generation between the upper mirror and lower mirror. The vertical resonant cavity includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region of at least one of the upper mirror, lower mirror, and first active region. A conducting channel within the inner mode confinement region is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during operation of the light source. A cavity length within the inner mode confinement region equals or exceeds the cavity length formed in the DHCBR.

Abstract: A composite light source includes a substrate having a top surface, and a first vertical light source formed in the substrate. The first light source includes least a lower mirror, a first active region above the lower mirror, wherein the first active region has a thickness sufficient when electrically pumped to emit predominantly a spontaneous vertical emission from the first active region towards the top surface having an angular range of at least (?) 30°. A second light source is formed in the substrate above the first active region including a second active region. The spontaneous vertical emission is at a first wavelength ?1 that optically drives said second active region to provide an emission at a second wavelength ?2, wherein ?2>?1.

Abstract: A composite light source includes a substrate having a top surface, and a first vertical light source formed in the substrate. The first light source includes least a lower mirror, a first active region above the lower mirror, wherein the first active region has a thickness sufficient when electrically pumped to emit predominantly a spontaneous vertical emission from the first active region towards the top surface having an angular range of at least (?) 30°. A second light source is formed in the substrate above the first active region including a second active region. The spontaneous vertical emission is at a first wavelength ?1 that optically drives said second active region to provide an emission at a second wavelength ?2, wherein ?2>?1.

Abstract: A semiconductor vertical resonant cavity light source includes an upper mirror and a lower minor that define a vertical resonant cavity. A first active region is within the vertical resonant cavity for light generation between the upper minor and lower mirror. The vertical resonant cavity includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region of at least one of the upper minor, lower minor, and first active region. A conducting channel within the inner mode confinement region is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during operation of the light source.

Abstract: Method and system for an up conversion lighting system for use with displays. The system includes an up converter-semiconductor light source for emitting an up conversion emission and a spectrally selective optical element in the path of the emission for selectively passing selected wavelengths. The optical element has a coating selected to pass selected wavelengths. The up converter-semiconductor light source includes an up converter for emitting the up conversion emission, a semiconductor light source coupled with the up converter to excite an up conversion material within the up converter to emit an up conversion emission and a spatial light modulator for modulating the up conversion emission. For a full color display, the up converter includes a red, green and blue up converter and a separate a light source coupled with the red, green and blue up converters.