Patents by Inventor Dennis G. Hanken

Dennis G. Hanken has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220139913
    Abstract: Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure in an IC device, prior to deposition of additional dielectric material, and the resulting assembly may be treated to form a dielectric layer around the structure.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Applicant: Intel Corporation
    Inventors: Sang-Won Park, Dennis G. Hanken, Sishir Bhowmick, Leonard C. Pipes
  • Patent number: 11270995
    Abstract: Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure in an IC device, prior to deposition of additional dielectric material, and the resulting assembly may be treated to form a dielectric layer around the structure.
    Type: Grant
    Filed: March 5, 2017
    Date of Patent: March 8, 2022
    Assignee: Intel Corporation
    Inventors: Sang-Won Park, Dennis G. Hanken, Sishir Bhowmick, Leonard C. Pipes
  • Publication number: 20200126980
    Abstract: Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure in an IC device, prior to deposition of additional dielectric material, and the resulting assembly may be treated to form a dielectric layer around the structure.
    Type: Application
    Filed: March 5, 2017
    Publication date: April 23, 2020
    Applicant: Intel Corporation
    Inventors: Sang-Won Park, Dennis G. Hanken, Sishir Bhowmick, Leonard C. Pipes
  • Patent number: 10147634
    Abstract: Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a flowable dielectric can be deposited over a fin-patterned semiconductive substrate, for example, using a flowable chemical vapor deposition (FCVD) process. The flowable dielectric may be flowed into the trenches between neighboring fins, where it can be cured in situ, thereby forming a dielectric layer over the substrate, in accordance with some embodiments. Through curing, the flowable dielectric can be converted, for example, to an oxide, a nitride, and/or a carbide, as desired for a given target application or end-use. In some embodiments, the resultant dielectric layer may be substantially defect-free, exhibiting no or an otherwise reduced quantity of seams/voids.
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: December 4, 2018
    Assignee: INTEL CORPORATION
    Inventors: Ritesh Jhaveri, Jeanne L. Luce, Sang-Won Park, Dennis G. Hanken
  • Publication number: 20160343609
    Abstract: Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a flowable dielectric can be deposited over a fin-patterned semiconductive substrate, for example, using a flowable chemical vapor deposition (FCVD) process. The flowable dielectric may be flowed into the trenches between neighboring fins, where it can be cured in situ, thereby forming a dielectric layer over the substrate, in accordance with some embodiments. Through curing, the flowable dielectric can be converted, for example, to an oxide, a nitride, and/or a carbide, as desired for a given target application or end-use. In some embodiments, the resultant dielectric layer may be substantially defect-free, exhibiting no or an otherwise reduced quantity of seams/voids.
    Type: Application
    Filed: August 1, 2016
    Publication date: November 24, 2016
    Applicant: INTEL CORPORATION
    Inventors: Ritesh JHAVERI, Jeanne L. LUCE, Sang-Won PARK, Dennis G. HANKEN
  • Patent number: 9406547
    Abstract: Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a flowable dielectric can be deposited over a fin-patterned semiconductive substrate, for example, using a flowable chemical vapor deposition (FCVD) process. The flowable dielectric may be flowed into the trenches between neighboring fins, where it can be cured in situ, thereby forming a dielectric layer over the substrate, in accordance with some embodiments. Through curing, the flowable dielectric can be converted, for example, to an oxide, a nitride, and/or a carbide, as desired for a given target application or end-use. In some embodiments, the resultant dielectric layer may be substantially defect-free, exhibiting no or an otherwise reduced quantity of seams/voids.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: August 2, 2016
    Assignee: INTEL CORPORATION
    Inventors: Ritesh Jhaveri, Jeanne L. Luce, Sang-Won Park, Dennis G. Hanken
  • Publication number: 20150179501
    Abstract: Techniques are disclosed for providing trench isolation of semiconductive fins using flowable dielectric materials. In accordance with some embodiments, a flowable dielectric can be deposited over a fin-patterned semiconductive substrate, for example, using a flowable chemical vapor deposition (FCVD) process. The flowable dielectric may be flowed into the trenches between neighboring fins, where it can be cured in situ, thereby forming a dielectric layer over the substrate, in accordance with some embodiments. Through curing, the flowable dielectric can be converted, for example, to an oxide, a nitride, and/or a carbide, as desired for a given target application or end-use. In some embodiments, the resultant dielectric layer may be substantially defect-free, exhibiting no or an otherwise reduced quantity of seams/voids.
    Type: Application
    Filed: December 24, 2013
    Publication date: June 25, 2015
    Inventors: Ritesh Jhaveri, Jeanne L. Luce, Sang-Won Park, Dennis G. Hanken
  • Patent number: 8642413
    Abstract: A method to form a strain-inducing epitaxial film is described. In one embodiment, the strain-inducing epitaxial film is a three-component epitaxial film comprising atoms from a parent film, charge-neutral lattice-substitution atoms and charge-carrier dopant impurity atoms. In another embodiment, the strain-inducing epitaxial film is formed by a multiple deposition/etch cycle sequence involving hydrogenated amorphous silicon, followed by charge carrier dopant and charge-neutral lattice-forming impurity atom implant steps and, finally, a kinetically-driven crystallization process.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: February 4, 2014
    Assignee: Intel Corporation
    Inventors: Anand S. Murthy, Jeffrey L. Armstrong, Dennis G. Hanken
  • Publication number: 20080070384
    Abstract: A method to form a strain-inducing epitaxial film is described. In one embodiment, the strain-inducing epitaxial film is a three-component epitaxial film comprising atoms from a parent film, charge-neutral lattice-substitution atoms and charge-carrier dopant impurity atoms. In another embodiment, the strain-inducing epitaxial film is formed by a multiple deposition/etch cycle sequence involving hydrogenated amorphous silicon, followed by charge carrier dopant and charge-neutral lattice-forming impurity atom implant steps and, finally, a kinetically-driven crystallization process.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 20, 2008
    Inventors: Anand S. Murthy, Jeffrey L. Armstrong, Dennis G. Hanken