Abstract: A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board.

Abstract: A low impedance electrical pathway from decoupling capacitance located on a circuit board to an integrated circuit chip. The integrated circuit includes multiple power and ground C4 bumps and is positioned on a first side of an integrated circuit carrier which is positioned on a first side of a circuit board. The integrated circuit carrier includes lateral conductors such as voltage and ground power planes. Power and ground carrier vias extend from the voltage and ground power planes, respectively, to the first side of the carrier, and power and ground subgroups of carrier vias extend from the voltage and ground power planes, respectively, to power and ground solder balls on a second side of the carrier. The circuit board includes power and ground plated through holes extending from contact pads on the first side of the circuit board to contact pads on a second side of the circuit board. Decoupling capacitors are positioned on the second side of the circuit board.

Abstract: In an integrated circuit carrier having a large number of power pins allocated to an internal power plane, the current flowing through the power pins may divide very unevenly, and result in current flow through some of the power pins which exceeds the maximum specification for either the package pin or for the socket into which the package may be inserted. In such a package, the magnitude of the current flowing through the highest current power pin may be reduced by configuring the resistance of the power plane(s) and vias to provide approximately the same total resistance to every power pin location. Slots may be cut in a package power plane to alter the current path and raise the impedance of the conduction path between some of the package power pins and the internal contact pads otherwise having the lowest impedance.

Abstract: An arrangement for a motherboard having a connector for a removable module is disclosed which increases the aggregate current carrying capacity of the connector by reducing the difference in current flow between power pins of the connector having the highest current flow and power pins of the connector having the lowest current flow. The current flow through all the power pins may then be operated nearer to the design maximum of the particular connector used. Thicker power planes within the motherboard (as well as within the module) reduce the effective resistance per square of the power plane, and help distribute the current more uniformly to a greater number of power pins of the connector. The use of multiple power planes in parallel also achieves a lower effective resistance. Multiple power terminals connecting the source of regulated power supply voltage (or reference voltage, such as ground) to the power plane may be used instead of just one power terminal.

Abstract: A decoupling capacitor structure formed integral with an integrated circuit chip and over top of circuitry defined thereon advantageously provides decoupling capacitance in close electrical proximity to switching circuits of the integrated circuit chip without substantially affecting die footprint. In contrast with on-die gate oxide capacitor configurations, a decoupling capacitor structure formed toward the back end of processing, typically after interconnect metal, allows large area capacitor structures without substantial impact on area available for devices and circuitry. Inductance associated with the intervening portion of a power supply loop circuit between switching circuits of the integrated circuit chip and the decoupling capacitor structure can be extremely low in configurations in accordance with the present invention. In some configurations, connection points, e.g., bonding pads and/or solder bumps for conveying power supply voltages, are defined over top of the decoupling capacitor structure.

Abstract: An article provides sealing of an electronic component connected to a mating fluid heat exchanger by providing a diaphragm with an opening shaped to fit about the heat exchanger, the opening forming a sealing lip. A clamping ring, which expands and contracts as a function of temperature is placed around the lip of the diaphragm and subject to a temperature to shrink the clamping ring against the lip and heat exchanger for sealing the diaphragm thereto. Preferably the clamping ring is a shape memory alloy metal. In addition, a compressible metal seal may be placed between the lip and the heat exchanger to increase the ability to seal.

Abstract: An electrical beam switch for interconnection between a plurality of inputs and outputs and includes a two-dimensional array of electrically charged particle emitters and an array of detectors facing the emitter array for receiving charged particles from various of the emitters. X and y electrical deflectors are positioned adjacent each of the emitters for directing the charged particles from each of the emitters to a selected one or more of the detectors. A screen lens may be positioned adjacent the array of detectors for focusing the directed beams on to the selected detector.

Abstract: A fluid heat exchanger for cooling an electronic component having a housing for receiving heat from the electronic component in which the housing has a fluid inlet and an outlet at opposite ends of the housing. The cross-sectional area of the housing for conveying fluid from the inlet to the outlet decreases from the inlet to the outlet thereby reducing pressure drop without sacrificing thermal performance. The cross-sectional area may be decreased by tilting a top of the housing relative to a bottom, or providing a plurality of fins separated by channels in which the cross-sectional area of the channels decreases from the inlet to the outlet.

Abstract: A fluid heat exchanger for cooling an electronic component having a housing for receiving heat from the electronic component in which the housing has a fluid inlet and an outlet at opposite ends of the housing. The cross-sectional area of the housing for conveying fluid from the inlet to the outlet decreases from the inlet to the outlet thereby reducing pressure drop without sacrificing thermal performance. The cross-sectional area may be decreased by tilting a top of the housing relative to a bottom, or providing a plurality of fins separated by channels in which the cross-sectional area of the channels decreases from the inlet to the outlet.

Abstract: A high performance fluid heat exchanger for cooling an electronic component which includes a housing having a base, a plurality of parallel fins in the housing, a center fed inlet connected to the housing opposite the base for supplying cooling fluid towards the base and toward the ends of the fins. A plate is positioned between the tops and bottoms of the fins and extends generally parallel to the base and extends towards but is spaced from the ends of the fins for providing a double cooling pass against the fins.

Abstract: A high performance fluid heat exchanger for cooling an electronic component which includes a housing having a base heat transfer member, a plurality of parallel fins in the housing and center fed concentric inlet and outlet tubes connected to the housing opposite the base for supplying cooling fluid towards the base and to the ends of the fins.

Abstract: A fluid heat exchanger for mating with an electronic component is supported from a fixed support. A connection between the fixed support and the heat exchanger is initially flexible for adjusting the position of the heat exchanger to accommodate variations in the height or attitude of the electronic component for providing a good thermal interface. Thereafter, the connection changes to a rigid connection to provide good structural suppport for the heat exchanger which allows the support to withstand vibration or shock without overloading the electronic component. The flexibility of the connection may be reversible for later readjusting the position of the heat exchanger relative to the electronic component.

Abstract: A high density, high performance and high fidelity connector system that can connect between electronic circuit planes having different wiring densities. The connector has a modular structure that avoids tolerance build-up for large (long) connections between two substrates, or between a substrate and a board. The connector design can accommodate differential temperature coefficients of expansion between the connector materials and the materials of the substrates being connected. The connector can be formed from low cost printed circuit board technology, or its equivalent, and can be configured to have controlled impedance, low crosstalk and wide bandwidth. The angle between surfaces being interconnected can vary from 0 to 360 degrees.

Abstract: A package for enclosing, protecting and cooling semiconductor integrated circuit chips. The package includes a generally planar substrate with the chips positioned thereon. Signal connections are provided between at least some of the chips. A heat sink is positioned in contact with the chips and includes microchannels through which a cooling fluid flows for purposes of transferring heat generated by the chips to such fluid. Manifolds are provided to direct the fluid to and from the microchannels, and microcapillary slots may be formed on the heat sink surface adjacent the chips to receive liquid to generate attractive forces between the heat sink and chips to facilitate heat transfer. Circuitry is provided to distribute power through the package and to the chips.

Abstract: A plurality of thin flat parallel positioned thermal conductive fins adapted to be connected to an object and a gas passageway passing between adjacent fins and extending between the top of the fins and opposite sides. Gas guides are positioned between adjacent fins at the center of the plurality of fins and redirect the outlet end of the passageways normal to the inlet ends of the passageways. Alternately positioned fins face in opposing directions. The fins may be integrally formed or individually formed. A thermal conductive base may be provided at the bottom of the plurality of fins for connection to an electronic package.

Abstract: A plurality of thin flat parallel positioned thermal conductive fins adapted to be connected to an object and a gas passageway passing between adjacent fins and extending between the top of the fins and opposite sides. Gas guides are positioned between adjacent fins at the center of the plurality of fins and redirect the outlet end of the pasageways normal to the inlet ends of the passageways. Alternately positioned fins face in opposing directions. The fins may be integrally formed or individually formed. A thermal conductive base may be provided at the bottom of the plurality of fins for connection to an electronic package.

Abstract: A package for enclosing, protecting and cooling semiconductor integrated circuit chips. The package includes a generally planar substrate with the chips positioned thereon. Signal connections are provided between at least some of the chips. A heat sink is positioned in contact with the chips and includes microchannels through which a cooling fluid flows for purposes of transferring heat generated by the chips to such fluid. Manifolds are provided to direct the fluid to and from the microchannels, and microcapillary slots may be formed on the heat sink surface adjacent the chips to receive liquid to generate attractive forces between the heat sink and chips to facilitate heat transfer. Circuitry is provided to distribute power through the package and to the chips.

Abstract: A Josephson Self Gating And circuit which is powered by pulsed or clipped alternating current and provides true and complement outputs in response to true and complement inputs is disclosed. Inputs applied during the duration of the applied pulsed power or clipped alternating current are delivered to outputs which are maintained in that state in spite of a change of input within the given pulse duration. In one embodiment, the presence of an output signal interrupts a current path which, in turn, disables a pair of AND gates. These gates, even though the input to them changes, can provide no other output until the applied power falls to zero resetting the pair of AND gates which are latching in character. In another embodiment, current paths of one AND gate are cross-coupled with a current path of another AND gate.