Abstract: An apparatus which includes one or more optical disk memory systems, one or more magnetic disk memory systems, and one semiconductor memory system, to store large amounts of data while operating under potentially severe environmental conditions. The preferred storage media for the apparatus is the optical disk memory system, but when environmental conditions do not permit successful operation of the optical disk memory, the apparatus switches storage of data to an alternate storage media such as magnetic disk memory or semiconductor memory until the severe environmental conditions subside. When environmental conditions subside, the optical disk memory is updated with the data stored on magnetic disk memory and semiconductor memory. Monitoring of environmental conditions is performed by the storage media systems, not by environmental sensors external to the system.

Abstract: A block replicate magnetic bubble memory organization is disclosed in which a number of storage loops are arranged between write and read tracks. Data in the read track is supplied to a deskewing circuit under the control of one section of an EAPROM so that the deskewing circuit outputs one page at a time, where each bit of the page is derived from a different storage loop, to a buffer and error correcting circuit which supplies corrected information to a data processing system as long as only one error bit has occurred on a page. If an error does occur in a page, the processor which has stored in it information relating to all of the used and unused loops of the system, controls another section of the EAPROM so that the defective loop will be exchanged for a good loop after a predetermined number of failures have occurred for the particular bad loop. The write side of the EAPROM is subsequently updated by the processor or remote processor that utilizes the read-out data.

Abstract: Apparatus for preventing the writing of data into an MNOS memory during various time intervals, whereby the over-writing and premature fatiguing of the differential voltage separation of the memory cells is prevented. The apparatus comprising an access memory that flags each address when it is first written during a write protect interval so that upon subsequent attempts to write the same address a write abort will occur.