Patents by Inventor DENNIS M. ROLLAND

DENNIS M. ROLLAND has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Corruption-preventative programming in solid-state data storage
    Patent number: 10020065
    Abstract: A device includes a non-volatile solid-state memory array comprising a plurality of blocks, each of the plurality of blocks configured to store data in a single-bit per cell mode or a multiple-bit per cell mode, and a controller. The controller is configured to receive write data from a host device, program the write data to a first block of the plurality of blocks of the memory array using the single-bit per cell mode, and perform a data consolidation operation on the first block at least in part by programming at least a portion of the write data together with data stored in a separate second block of the memory array to a third block of the memory array using the multiple-bit per cell mode.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: July 10, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventors: David S. Seekins, Dennis M. Rolland
  • CORRUPTION-PREVENTATIVE PROGRAMMING IN SOLID-STATE DATA STORAGE
    Publication number: 20170133100
    Abstract: A device includes a non-volatile solid-state memory array comprising a plurality of blocks, each of the plurality of blocks configured to store data in a single-bit per cell mode or a multiple-bit per cell mode, and a controller. The controller is configured to receive write data from a host device, program the write data to a first block of the plurality of blocks of the memory array using the single-bit per cell mode, and perform a data consolidation operation on the first block at least in part by programming at least a portion of the write data together with data stored in a separate second block of the memory array to a third block of the memory array using the multiple-bit per cell mode.
    Type: Application
    Filed: January 23, 2017
    Publication date: May 11, 2017
    Inventors: David S. SEEKINS, Dennis M. ROLLAND
  • Solid-state memory corruption mitigation
    Patent number: 9564212
    Abstract: Systems and methods are disclosed for programming data in a non-volatile memory array are disclosed. Certain embodiments provide a non-volatile solid-state memory array and a controller configured to receive write data from a host device, program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode, and perform a data consolidation operation on the first block, wherein said performing garbage collection comprises programming at least a portion of the write data to a second block not in LPO programming mode.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: February 7, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: David S. Seekins, Dennis M. Rolland
  • SOLID-STATE MEMORY CORRUPTION MITIGATION
    Publication number: 20150324282
    Abstract: Systems and methods are disclosed for programming data in a non-volatile memory array are disclosed. Certain embodiments provide a non-volatile solid-state memory array and a controller configured to receive write data from a host device, program the write data to a first block of the memory array in a lower-page-only (LPO) programming mode, and perform a data consolidation operation on the first block, wherein said performing garbage collection comprises programming at least a portion of the write data to a second block not in LPO programming mode.
    Type: Application
    Filed: June 23, 2014
    Publication date: November 12, 2015
    Inventors: DAVID S. SEEKINS, DENNIS M. ROLLAND