Abstract: The present invention is directed to methods for formation of refractory carbide, nitride, and boride coatings without use of a binding agent. The present invention is directed to methods of creating refractory coatings with controlled porosity. Refractory coatings can be formed from refractory metal, metal oxide, or metal/metal oxide composite refractory coating precursor of the 9 refractory metals encompassed by groups 4-6 and periods 4-6 of the periodic table; non-metallic elements (e.g. Si & B) and their oxides (i.e. SiO2 & B2O3) are also pertinent. The conversion of the refractory coating precursor to refractory carbide, nitride or boride is achieved via carburization, nitridization, or boridization in the presence of carbon-containing (e.g. CH4), nitrogen containing (e.g. NH3), and boron-containing (e.g. B2H6) gaseous species. Any known technique of applying the refractory coating precursor can be used.

Abstract: A composite precursor powder, including one or more metals or metalloids, and one or more oxides, wherein a molar ratio of the one or more metals or metalloids to the one or more oxides is from about 1:0.01 to about 1:4, and wherein the molar ratio of the one or more metals or metalloids to the one or more oxides is configured according to a desired volumetric change of the composite precursor powder when converted to a non-oxide ceramic.

Abstract: Embodiments include herein are directed towards a method for electronic circuit design and more specifically towards determining return path quality in an electrical circuit. Embodiments may include providing, using a processor, an electronic circuit design and identifying at least one net associated with the electronic circuit design. Embodiments may further include extracting an ideal loop inductance for the at least one net and extracting a real loop inductance for the at least one net. Embodiments may also include calculating a return path quality factor based upon, at least in part, the ideal loop inductance and the real loop inductance.

Abstract: Embodiments include herein are directed towards a method for electronic circuit design. Embodiments may include displaying, at a graphical user interface, an electronic circuit design topology environment and allowing a user to select, create, or modify an entirely single pin topology, an entirely multi-pin topology, or a combination of a single pin topology and a multi-pin topology for one or more portions of the electronic circuit design topology environment. Embodiments may also include receiving a selection of a designated portion of the electronic circuit design topology environment and generating, at the graphical user interface, a first, pin-adjustable symbol in accordance with the selected topology at the designated portion.

Abstract: The present invention is directed to methods for formation of refractory carbide, nitride, and boride coatings without use of a binding agent. The present invention is directed to methods of creating refractory coatings with controlled porosity. Refractory coatings can be formed from refractory metal, metal oxide, or metal/metal oxide composite refractory coating precursor of the 9 refractory metals encompassed by groups 4-6 and periods 4-6 of the periodic table; non-metallic elements (e.g. Si & B) and their oxides (i.e. SiO2 & B2O3) are also pertinent. The conversion of the refractory coating precursor to refractory carbide, nitride or boride is achieved via carburization, nitridization, or boridization in the presence of carbon-containing (e.g. CH4), nitrogen containing (e.g. NH3), and boron-containing (e.g. B2H6) gaseous species. Any known technique of applying the refractory coating precursor can be used.

Abstract: The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for analyzing a power delivery network (PDN) system. The method may include receiving at least one of a chip power model, a package power model and a board power model at the computing device and co-simulating at least two of the chip power model, the package power model, and the board power model. Numerous other features are also within the scope of the present disclosure.

Abstract: A system and method are provided for generating a programmably implemented model which emulates a power delivery network serving an integrated circuit (IC) core in an electronic system. The system and method generally comprise measures for establishing a power integrity (PI) topology including models for a voltage regulator module that generates at least one predetermined supply voltage level, and for a conductive power rail portion of the power delivery network (PDN). The system and method further comprise measures for interconnecting to the conductive power rail portion model a first behavioral model indicative of the current consumption characteristics of the IC core, and a second behavioral model indicative of the current consumption of an IO interface buffer driving an output signal of the electronic system.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for analyzing a power delivery network (PDN) associated with an electronic circuit design. Embodiments may include extracting, using at least one processor, an electromagnetic (EM) model for each of one or more discontinuity structures associated with the circuit design and generating a three dimensional adaptive mesh model that is based upon, at least in part, the extracted EM model. Numerous other features are also within the scope of the present disclosure.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for displaying one or more results of a power delivery network (PDN) analysis associated with an electronic circuit design. The method may include extracting, using at least one processor, an electromagnetic (EM) model for each of one or more discontinuity structures associated with the electronic circuit design. The method may further include performing a power delivery network analysis of the electronic circuit design, the PDN analysis including a Method of Moments (MoM) calculation. The method may also include displaying a three dimensional image depicting one or more results of the PDN analysis. Numerous other features are also within the scope of the present disclosure.

Abstract: A method and system are provided for parametrically adapting a behavioral model pre-configured for a preset supply reference level to fluctuations therein. The behavioral model is adaptively scaled for deviation of the electronic system supply reference from its preset level. The scaling includes reconstructing a surrogate device parametrically representative of a portion of the behavioral model's undisclosed circuit. The reconstruction includes pre-setting a transistor type for the surrogate device, such that the surrogate device is configured with a conductive channel current-voltage characteristic of the preselected transistor type. Device-specific properties for the surrogate device are generated based on selective cross-correlation of operating points between the conductive channel current-voltage characteristic and V-t and I-V curves associated with the behavioral model.

Abstract: A system and method is provided for generating a programmably implemented model which emulates a power delivery network serving an integrated circuit (IC) core in an electronic system. The system and method generally comprise measures for establishing a power integrity (PI) topology including models for a voltage regulator module that generates at least one predetermined supply voltage level, and for a conductive power rail portion of the power delivery network (PDN). The system and method further comprise measures for interconnecting to the conductive power rail portion model a first behavioral model indicative of the current consumption characteristics of the IC core, and a second behavioral model indicative of the current consumption of an IO interface buffer driving an output signal of the electronic system.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for analyzing a power delivery network (PDN) system. The method may include receiving at least one of a chip power model, a package power model and a board power model at the computing device and co-simulating at least two of the chip power model, the package power model, and the board power model. Numerous other features are also within the scope of the present disclosure.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for displaying one or more results of a power delivery network (PDN) analysis associated with an electronic circuit design. The method may include extracting, using at least one processor, an electromagnetic (EM) model for each of one or more discontinuity structures associated with the electronic circuit design. The method may further include performing a power delivery network analysis of the electronic circuit design, the PDN analysis including a Method of Moments (MoM) calculation. The method may also include displaying a three dimensional image depicting one or more results of the PDN analysis. Numerous other features are also within the scope of the present disclosure.

Abstract: The subject application relates to a method and system for power delivery network analysis. The present disclosure is directed towards a computer-implemented method for analyzing a power delivery network (PDN) associated with an electronic circuit design. Embodiments may include extracting, using at least one processor, an electromagnetic (EM) model for each of one or more discontinuity structures associated with the circuit design and generating a three dimensional adaptive mesh model that is based upon, at least in part, the extracted EM model. Numerous other features are also within the scope of the present disclosure.

Abstract: A method for in-frame repairing of a thermal barrier coating (12) on a gas turbine component includes cleaning a desired surface portion (10) of the component without removing the component from the gas turbine. The method also includes roughening the surface portion in-frame, applying a bond coat (68) to the surface portion in-frame, and applying a ceramic topcoat (70) to the bond coat, in-frame. A system (28) for cleaning the surface portion in-frame includes an abrasive media (34) having a state change characteristic occurring at a temperature lower than an operating temperature of the gas turbine so that the abrasive media changes from a solid state to another state allowing the media to exit the gas turbine during operation. The system also includes an abrasive media sprayer (36) to direct a spray of the abrasive media at the desired surface portion.

Abstract: A method for in-frame repairing of a thermal barrier coating (12) on a gas turbine component includes cleaning a desired surface portion (10) of the component without removing the component from the gas turbine. The method also includes roughening the surface portion in-frame, applying a bond coat (68) to the surface portion in-frame, and applying a ceramic topcoat (70) to the bond coat, in-frame. A system (28) for cleaning the surface portion in-frame includes an abrasive media (34) having a state change characteristic occurring at a temperature lower than an operating temperature of the gas turbine so that the abrasive media changes from a solid state to another state allowing the media to exit the gas turbine during operation. The system also includes an abrasive media sprayer (36) to direct a spray of the abrasive media at the desired surface portion.