Abstract: Described is a Single-Photon Avalanche Diode (SPAD) array microchip comprising: a plurality of SPAD sensors; and a triggering circuit configured to detect and read out the triggering order of SPAD sensors over a timing interval wherein the timing interval comprises one or more frames. An event based neuromorphic SPAD array microchip is also described. The chip architecture and triggering methodology takes a local group of SPAD sensors connected in a certain way and by using simple digital circuits emulating how neurons behave, patterns within a local receptive field are identified. Only when these unique patterns or features are identified are “events” triggered for each receptive field in the order they occur, or in an asynchronous manner. Each neuromorphic circuit (or collection of silicon neurons) act over overlapping receptive fields, and are tiled across the entire visual spatial field of the SPAD array to a form a convolution layer.

Abstract: Described is a Single-Photon Avalanche Diode (SPAD) array microchip comprising: a plurality of SPAD sensors; and a triggering circuit configured to detect and read out the triggering order of SPAD sensors over a timing interval wherein the timing interval comprises one or more frames. An event based neuromorphic SPAD array microchip is also described. The chip architecture and triggering methodology takes a local group of SPAD sensors connected in a certain way and by using simple digital circuits emulating how neurons behave, patterns within a local receptive field are identified. Only when these unique patterns or features are identified are “events” triggered for each receptive field in the order they occur, or in an asynchronous manner. Each neuromorphic circuit (or collection of silicon neurons) act over overlapping receptive fields, and are tiled across the entire visual spatial field of the SPAD array to a form a convolution layer.

Abstract: Compact Single Photon Avalanche Diode (SPAD) array structures are described. An on board common trigger circuit is used for two or more SPAD structures. The common trigger includes a compact counter and flash memory constructed adjacent two or more SPAD structures. Triggering of a SPAD latches the value of the counter and the value is stored in the memory along with the ID of the triggering SPAD. The counter continues counting, and if another SPAD subsequently triggers, the counter is again latched and the value is stored in the memory along with the ID of the subsequently triggering SPAD. The memory can be read and the triggering circuit reset. Methods for designing compact SPAD structures, a compact active quenching circuit and a compact 16 bit counter are described.

Abstract: Compact Single Photon Avalanche Diode (SPAD) array structures are described. An on board common trigger circuit is used for two or more SPAD structures. The common trigger includes a compact counter and flash memory constructed adjacent two or more SPAD structures. Triggering of a SPAD latches the value of the counter and the value is stored in the memory along with the ID of the triggering SPAD. The counter continues counting, and if another SPAD subsequently triggers, the counter is again latched and the value is stored in the memory along with the ID of the subsequently triggering SPAD. The memory can be read and the triggering circuit reset. Methods for designing compact SPAD structures, a compact active quenching circuit and a compact 16 bit counter are described.