Abstract: Systems and apparatuses are disclosed that include a modular power amplifier having a power amplifier subsystem with a first 90 degree hybrid block configured to receive an RF signal and output a split RF signal with components having a 90 degree phase shift, a second 90 degree hybrid block configured to receive and combine the split RF signal by removing the 90 degree phase shift, a high-power amplifier configured to amplify at least one of the components of the split RF signal. The modular power amplifier also includes a power distribution module configured to regulate an amount of power input to the high-power amplifier and a power sequencer configured to control the timing of power delivery by the power distribution module. Three-dimensional power amplifiers having a first high-power amplifier and a second high-power amplifier having different orientations causing a reduction in electromagnetic interference are also disclosed.

Abstract: A system for adjusting bias power provided to a radio-frequency amplifier to increase plurality of figures of merit based on sensed characteristics of the amplifier and/or characteristics of the input or output power.

Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.

Abstract: A tunable analog noise-cancelling transversal reconfigurable filter for filtering an RF signal. The filter includes a noise-cancelling balun responsive to the RF signal and providing gain and noise suppression, and a time delay network responsive to the signal from the balun. The time delay network includes a single continuous three-dimensional air coaxial line where a separate tap is provided between sections of the line. The filter also includes a multiplication and summing network having a plurality of multiplication stages, where each stage is fed by a voltage signal from at least one of the taps, and each stage includes a multiplication amplifier that amplifies the voltage signal. A tuning element provides a multiplication coefficient to the amplified signal. Each amplified signal in each stage is added on an output line, where the multiplication and summing network operates under Millman's Theorem.

Abstract: There is provided a finite impulse response (FIR) filter for filtering an input voltage signal to generate an output current signal, the FIR filter including a plurality of sample and hold (SH) circuits configured to simultaneously receive the input voltage signal, to sample the input voltage signal at successive sample times according to a sample clock, and to generate a plurality of sampled voltage signals, and a plurality of programmable analog multipliers coupled to the plurality of SH circuits and configured to multiply the plurality of sampled voltage signals by a plurality of binary multiplication factors to generate the output current signal.

Abstract: An exemplary electronic light processing cell uses a photo sensor unit to provide an analog electrical output proportional to an amount of light impinging on the photo sensor. A noise source provides a noise output that is compared by a comparator, during a plurality of times during a frame of an image, with the analog electrical output to generate a binary digital output representative of each comparison. A digital counter counts the binary digital outputs during the frame and stores a count at the end of a frame where the value of the stored count is proportional the light impinging the photo sensor. The value of the stored count is adapted for use by an image processing unit to render an image.

Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.

Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.

Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.

Abstract: There is provided a finite impulse response (FIR) filter for filtering an input voltage signal to generate an output current signal, the FIR filter including a plurality of sample and hold (SH) circuits configured to simultaneously receive the input voltage signal, to sample the input voltage signal at successive sample times according to a sample clock, and to generate a plurality of sampled voltage signals, and a plurality of programmable analog multipliers coupled to the plurality of SH circuits and configured to multiply the plurality of sampled voltage signals by a plurality of binary multiplication factors to generate the output current signal.

Abstract: There is provided a programmable multiplier circuit for multiplying an input voltage signal by a binary coefficient, the multiplier circuit including a transconductor including a first amplifying transistor configured to convert the input voltage signal to a current signal, the first amplifying transistor having a gate configured to receive the input voltage signal, and a coefficient multiplier coupled to the transconductor and configured to multiply the current signal by the binary coefficient to generate an amplified current signal.

Abstract: Embodiments of a drain modulator that uses high power switch sensing to control active pulldown are generally described herein. In some embodiments, a logic and sense module is arranged to receive a control signal for controlling an on and an off state of an input of a switch to turn a high power voltage at an output of the switch on and off. A pullup module and a pulldown module are coupled to the input of the switch. An active pulldown module coupled to the output of the switch. The logic and sense module monitors the input to the switch and activates the active pulldown module to drain the output of the switch to a zero voltage when the input of the switch transitions to the off state.

Abstract: Embodiments of a drain modulator that uses high power switch sensing to control active pulldown are generally described herein. In some embodiments, a logic and sense module is arranged to receive a control signal for controlling an on and an off state of an input of a switch to turn a high power voltage at an output of the switch on and off. A pullup module and a pulldown module are coupled to the input of the switch. An active pulldown module coupled to the output of the switch. The logic and sense module monitors the input to the switch and activates the active pulldown module to drain the output of the switch to a zero voltage when the input of the switch transitions to the off state.