Patents by Inventor Denton E. Gentry

Denton E. Gentry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250279979
    Abstract: This technology manages overlapping subnets through IPv6-to-IPv4 translation. A method involves an application on a source device obtaining an IPv6 destination address from a coordination service. This address includes an IPv4 destination and a gateway identifier. The application generates a packet to this IPv6 address and sends it to a private networking service on the source device. The service uses the gateway identifier to determine the gateway's public IP address, as indicated by the coordination service. It then encapsulates the packet and sends it to the gateway at the public IP address.
    Type: Application
    Filed: May 19, 2025
    Publication date: September 4, 2025
    Inventors: Denton E. Gentry, David J. Crawshaw, Maya A. Kaczorowski, Bradley J. Fitzpatrick
  • Patent number: 9323308
    Abstract: A system includes a power-consuming, at least one energy storage device, and a power management system. The facility is configured to receive electrical power from an electric utility grid. The energy storage device is located at the power consuming facility and is configured to store electrical energy from the electrical power received from the electric utility grid. The power management system is configured to receive, from the electric utility grid, a request that indicates an amount of power and, in response to the request, to cause at least a portion of the power-consuming facility to be powered by the at least one energy storage device rather than the power received from the electric utility grid such that an amount of the received power consumed by the power-consuming facility is reduced by at least the indicated amount.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: April 26, 2016
    Assignee: Google Inc.
    Inventors: Taliver Brooks Heath, Denton E. Gentry
  • Patent number: 8588989
    Abstract: A system includes a power-consuming, at least one energy storage device, and a power management system. The facility is configured to receive electrical power from an electric utility grid. The energy storage device is located at the power consuming facility and is configured to store electrical energy from the electrical power received from the electric utility grid. The power management system is configured to receive, from the electric utility grid, a request that indicates an amount of power and, in response to the request, to cause at least a portion of the power-consuming facility to be powered by the at least one energy storage device rather than the power received from the electric utility to grid such that an amount of the received power consumed by the power-consuming facility is reduced by at least the indicated amount.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: November 19, 2013
    Assignee: Google Inc.
    Inventors: Taliver Brooks Heath, Denton E. Gentry
  • Publication number: 20030105798
    Abstract: The present invention relates to handling interrupts in a multiprocessor system. An interrupt controller can receive input from a variety of interrupt sources, such as peripheral components and peripheral interfaces. Interrupts and their associated characteristics are identified. In one example, interrupt characteristics can be compared with characteristics of other interrupts handled by processors in the multiprocessor system. Interrupt characteristics are used to select a processor to run a routine for handling the associated interrupt. Intelligent selection provides efficient and effective distribution of interrupts.
    Type: Application
    Filed: December 3, 2001
    Publication date: June 5, 2003
    Inventors: Ted Kim, Denton E. Gentry
  • Patent number: 5953240
    Abstract: A CPU adapted to calculate a checksum simultaneously on multiple values packed into a single register. An adder is provided which adds a number of values packed into a first register to a number of packed values from a second register. The adder is constructed, or partitioned, so that the values do not propagate their carry bit to the next value. A special carry bit adder is provided which will add a carry bit out of each partitioned portion back into the sum value to generate the sum required by the checksum protocol.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: September 14, 1999
    Assignee: Sun Microsystems, Inc.
    Inventors: J. Arjun Prabhu, Denton E. Gentry
  • Patent number: 5875352
    Abstract: An on-chip cache memory is used to provide a high speed access mechanism to frequently used channel state information for operation of a DMA device that supports multiple virtual channels in a high speed network interface. When an access to a particular channel state is performed, e.g., by a host processor or the DMA device, the cache is first accessed and if the state information is not located currently in the cache, external memory is read and the state information is written to the cache. As the cache does not store all the states stored in external memory, replacement algorithms are utilize to determine which channel state information to remove from the cache in order to provide room to store a recently accessed channel. A doubly linked list is used to track the most recently used channel. As cached channel information is accessed, the corresponding entry is moved to the top of the list. The doubly linked list provides a rapid apparatus and method for updating pointers to the cache.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: February 23, 1999
    Assignee: Sun Microsystems, Inc.
    Inventors: Denton E. Gentry, Rasoul M. Oskouy
  • Patent number: 5848293
    Abstract: A method and apparatus that provides for the atomic transfer of data associated with a command to be transferred to a device consisting of a cache memory which supports a plurality of virtual devices. The atomic transfer enables the device to initiate and complete execution of the command immediately with respect to a particular virtual device without having to wait for data to come during subsequent bus transfers. This insures that the state of the device will be consistent during execution of the command.
    Type: Grant
    Filed: November 3, 1995
    Date of Patent: December 8, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: Denton E. Gentry
  • Patent number: 5778180
    Abstract: A method and an apparatus for reducing data copying overhead associated with protected memory operating systems. In an ATM (Asynchronous Transfer Method) network, the present invention's NIC (network interface circuit) demultiplexes the information in the header of the incoming packet and routes the packet directly to its final destination using the present invention's concept of targeted buffer rings. Thus, instead of having the packet be DMA'd to a buffer in a descriptor ring in the kernel, it may be routed directly to the buffer ring of the destination process.
    Type: Grant
    Filed: November 6, 1995
    Date of Patent: July 7, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Denton E. Gentry, Rasoul M. Oskouy
  • Patent number: 5740448
    Abstract: A method and an apparatus for hardware and software interaction in data transfers of shared data structures in memory. The method and apparatus decreases the number of mutex lockings required to prevent conflict between different software attempting to access the same data and keeps the index value for each buffer in use in order to prevent conflicts between buffer replacement and packet arrival. In an exemplary implementation of the method and apparatus of the present invention, a receive hardware of a computer system keeps an index value for each buffer in use. This index value is placed in a completion ring protected by a mutex, and placed in a software queue protected by mutex. The mutexes assure that only one thread will possess a given index at a given time. No mutex locking is required for a buffer table containing software address and related information.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: April 14, 1998
    Assignee: Sun Microsystems, Inc.
    Inventors: Denton E. Gentry, Prakash Kashyap
  • Patent number: 5675829
    Abstract: A method and apparatus of coordinating data transfer between hardware and software in a computer system through the use of a semaphore mechanism is disclosed. When a data packet is queued by preparing an entry in a data descriptor ring, software provides the descriptor entry number to a first storage field in a predetermined storage location which is accessible by hardware. Hardware accounts for the transactions it has completed by writing the descriptor entry number to a second storage field in the storage location. To determine if there is additional data to process, hardware compares the contents of the first storage field and the contents of the second storage field. If the contents of both storage fields are equal, the corresponding ring or channel has run out of data and no additional data is to be processed.
    Type: Grant
    Filed: July 7, 1995
    Date of Patent: October 7, 1997
    Assignee: Sun Microsystems, Inc.
    Inventors: Rasoul M. Oskouy, Denton E. Gentry