Patents by Inventor Deok Lee

Deok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10808018
    Abstract: A peptide is described herein that has: (i) a simple structure compared to existing natural human erythropoietin, thus capable of easily passing through a tissue-blood barrier, (ii) excellent bioactivity with respect to cell-protecting activity, (iii) a low manufacturing cost, thus being economically advantageous, and (iv) no side effects on cell proliferation. Also, a pharmaceutical composition comprising the erythropoietin-derived peptide described herein as an active ingredient is described. The pharmaceutical composition may be used for preventing or treating cell damage-related illnesses, such as stroke, mechanical damage or ischemic damage to the nervous system, myocardial infarction, retinal damage, and diabetes. Also, the described pharmaceutical composition may be used for preventing cell damage.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: October 20, 2020
    Assignee: SYLUS CO., LTD.
    Inventors: Che il Moon, Seung Yoo, Chang-Hun Lee, So Kim, Deok Lee
  • Publication number: 20070048947
    Abstract: Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical sidewalls and the lower region is formed with inclined sidewalls to produce a wider base portion. The disclosed semiconductor fin construction will also typically include a horizontal step region at the interface between the upper region and the lower region. Also disclosed are a series of methods of manufacturing semiconductor devices incorporating semiconductor fins having this dual construction and incorporating various combinations of insulating materials such as silicon dioxide and/or silicon nitride for forming shallow trench isolation (STI) structures between adjacent semiconductor fins.
    Type: Application
    Filed: October 31, 2006
    Publication date: March 1, 2007
    Inventors: Deok Lee, Byeong Lee, In Jung, Yong Son, Siyoung Choi, Taek Kim
  • Publication number: 20060001787
    Abstract: An LCD display cable of removing a residual direct current is disclosed. The LCD includes an LC panel for displaying an image, a first and a second common electrode line, a third common electrode line, gate lines, and data lines. The first and second common electrode lines are vertically arranged at left and right of the LC panel. The third common electrode line is connected between the first and second common electrode lines. The gate lines are arranged in parallel with the third common electrode line. The data lines are arranged perpendicularly to the third common electrode line. The third common electrode line has a static electricity protection pattern formed on one side thereof and a predetermined conductive pattern or a predetermined metal pattern formed on the other side thereof. The predetermined conductive pattern or predetermined metal pattern eliminate the residual direct current.
    Type: Application
    Filed: June 27, 2005
    Publication date: January 5, 2006
    Inventors: Deok Lee, Kyoung Lee
  • Publication number: 20050270445
    Abstract: A color filter-on-thin film transistor substrate includes gate data lines crossing each other and defining pixel areas, thin film transistors is located at crossings of gate and data lines, pixel electrodes connected to the thin film transistors and formed within the pixel areas, and stripe-shaped color filters overlapping a plurality of pixel areas and oriented parallel to one of the gate and data lines.
    Type: Application
    Filed: May 24, 2005
    Publication date: December 8, 2005
    Applicant: LG. PHILIPS LCD CO., LTD.
    Inventors: Deok Lee, Kwang Oh, Myung Nam, Ki Cho, Se Shin, Bong Kim, Kwon Choi
  • Publication number: 20050035391
    Abstract: Disclosed is a semiconductor fin construction useful in FinFET devices that incorporates an upper region and a lower region with wherein the upper region is formed with substantially vertical sidewalls and the lower region is formed with inclined sidewalls to produce a wider base portion. The disclosed semiconductor fin construction will also typically include a horizontal step region at the interface between the upper region and the lower region. Also disclosed are a series of methods of manufacturing semiconductor devices incorporating semiconductor fins having this dual construction and incorporating various combinations of insulating materials such as silicon dioxide and/or silicon nitride for forming shallow trench isolation (STI) structures between adjacent semiconductor fins.
    Type: Application
    Filed: February 17, 2004
    Publication date: February 17, 2005
    Inventors: Deok Lee, Byeong Lee, In Jung, Yong Son, Siyoung Choi, Taek Kim