Patents by Inventor Deok-Su Han

Deok-Su Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240043718
    Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition. The polishing composition for a semiconductor process may be applied to a process of polishing an amorphous carbon layer, may exhibit a high removal rate of the amorphous carbon layer, may prevent the occurrence of defects by preventing carbon residue from being re-adsorbed onto a semiconductor substrate during the polishing process, and has excellent storage stability. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 8, 2024
    Inventors: Han Teo PARK, Deok Su HAN, Jang Kuk KWON, Seung Chul HONG
  • Publication number: 20240043719
    Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition, and specifically, to a polishing composition which is applied to a process of polishing an amorphous carbon layer (ACL). The polishing composition may exhibit a high removal rate of the amorphous carbon layer, does not cause the problem that the removal rate is lowered at 45° C. or higher. In addition, the polishing composition has increased long-term storage stability, may prevent carbon residue generated during the polishing process from being adsorbed onto the semiconductor substrate, and may prevent contamination of the polishing pad. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 8, 2024
    Inventors: Han Teo PARK, Deok Su HAN, Jang Kuk KWON, Seung Chul HONG
  • Publication number: 20240030041
    Abstract: The present invention relates to a polishing composition for a semiconductor process, a method of preparing the polishing composition, and a method of fabricating a semiconductor device using the polishing composition. The polishing composition for a semiconductor process contains abrasive particles, an accelerator, and a stabilizer. The polishing composition has excellent long-term storage stability because the particles contained therein do not aggregate even after the polishing composition is stored at 60° C. or higher for a long time. In addition, the polishing composition may be applied to a process of polishing an amorphous carbon layer, may exhibit a high removal rate, prevent carbon residue generated during the polishing process from being adsorbed onto a semiconductor substrate, and prevent contamination of a polishing pad. The present invention may also provide a method of fabricating a semiconductor device using the polishing composition for a semiconductor process.
    Type: Application
    Filed: October 18, 2021
    Publication date: January 25, 2024
    Inventors: Han Teo PARK, Deok Su HAN, Jang Kuk KWON, Seung Chul HONG
  • Publication number: 20230407135
    Abstract: A polishing composition and method for semiconductor processing being applicable to a semiconductor process including a process of polishing a semiconductor wafer including a through-silicon via (TSV), being capable of implementing excellent polishing performance, being capable of minimizing defects such as dishing, erosion, and protrusion, being capable of realizing an evenly polished surface without deviation between films when polishing a surface where a plurality of different films is exposed to the outside, including abrasive grains and at least one additive, and having a value of 1.45 to 1.90 as calculated by Equation 1.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 21, 2023
    Inventors: Seung Chul HONG, Deok Su HAN, Kang Sik MYUNG, Han Teo PARK, Hyeong Ju LEE, Yong Soo CHOI
  • Publication number: 20230332017
    Abstract: A composition for semiconductor processing includes abrasive particles, and a dishing control additive, comprising a first dishing control additive and a second dishing control additive. The first dishing control additive includes a compound having a betaine group and a salicylic group or a derivative thereof, and the second dishing control additive includes an azole-based compound. The first dishing control additive includes 0.07 parts by weight or more based on 100 parts by weight of the abrasive particles, and the second dishing control additive includes 0.13 parts by weight or less based on 100 parts by weight of the abrasive particles.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 19, 2023
    Applicant: SK enpulse Co., Ltd.
    Inventors: Seung Chul HONG, Kangsik MYUNG, Han Teo PARK, Deok Su HAN, Yongsoo CHOI
  • Publication number: 20230332016
    Abstract: A composition for semiconductor processing, includes abrasive particles surface-modified with an amino silane-based compound; a copper erosion inhibitor, including an azole-based compound; a copper surface protectant, including a compound having a betaine group and a salicylic group or a derivative thereof; and a surfactant, including fluorine in a molecule thereof. A surface of the surface-modified abrasive particles comprises an amino silane group.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 19, 2023
    Applicant: SK enpulse Co., Ltd.
    Inventors: Deok Su HAN, Seung Chul HONG, Han Teo PARK, Hwan Chul KIM, Hyeong Ju LEE
  • Publication number: 20230332014
    Abstract: The present invention relates to a semiconductor process polishing composition and a semiconductor device manufacturing method in which the polishing composition is applied, and can provide a preparation method applied to a CMP process for an amorphous carbon layer, and thus exhibits a high polishing rate, prevents, during a CMP process, the re-adsorption of carbon residue on a semiconductor substrate and the contamination of a polishing pad, and stabilizes an accelerator in the polishing composition so that the storage stability thereof is excellent. In addition, provided is a semiconductor device manufacturing method in which the semiconductor process polishing composition is applied.
    Type: Application
    Filed: August 31, 2021
    Publication date: October 19, 2023
    Inventors: Han Teo PARK, Deok Su HAN, Jang Kuk KWON, Seung Chul HONG
  • Publication number: 20230227696
    Abstract: The present disclosure is a composition for a semiconductor process applied to a polishing process of a semiconductor wafer and, more specifically, to a semiconductor process involving a polishing process of a semiconductor wafer, wherein the composition includes abrasive particles, and the zeta potential of the abrasive particles is ?50 mV to ?10 mV at a pH of 6, and the zeta potential change rate represented by Equation 1 below is 6 mV to 30 mV: [Equation 1] Zeta potential change rate (mV/pH)=|(Z6?Z5)/(p6?p5)| where p6 denotes pH 6, p5 denotes pH 5, Z6 denotes a zeta potential at the pH 6, and Z5 denotes a zeta potential at the pH 5.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 20, 2023
    Inventors: Seung Chul HONG, Deok Su HAN, Han Teo PARK, Hwan Chul KIM, Kyu Hun KIM, Eun Sun JOENG
  • Publication number: 20230040931
    Abstract: Provided is a polishing composition for a semiconductor process comprising abrasive particles, the abrasive particles containing an amine-based polishing rate improver, and comprising the amine-based polishing rate improver. Provided is a polishing composition for a semiconductor process further comprising an amine-based surface modifier around the surface of the abrasive particles, wherein the sum of the content of an amine group contained in the amine-based polishing rate improver and the content of an amine group contained in the amine-based surface modifier is 0.0185% by weight or more based on the total composition weight. The polishing composition for a semiconductor process may implement the polishing rate and defect prevention performance within a target range in polishing the boron-doped polysilicon layer.
    Type: Application
    Filed: July 21, 2022
    Publication date: February 9, 2023
    Inventors: Seung Chul HONG, Deok Su Han, Han Teo Park, Kyu Hun Kim, Eun Sun Joeng, Jang Kuk Kwon, Hyeong Ju Lee
  • Publication number: 20230019730
    Abstract: Embodiments provide a polishing composition for a semiconductor process facilitating the formation of a microcircuit pattern and minimizing the generation of defects and scratches and a method of preparing a polished article using the same. Embodiments provide a polishing composition for a semiconductor process, in which the absorbance ratio of a group having a specific size of particle diameter compared to the overall average particle size (D50) is a predetermined ratio or less with respect to the absorbance of a group having a particle diameter more than 0.5 times and 2.5 times or less the overall average particle size.
    Type: Application
    Filed: July 7, 2022
    Publication date: January 19, 2023
    Applicants: SKC solmics Co., Ltd., SK HYNIX INC.
    Inventors: SEUNG CHUL HONG, DEOK SU HAN, JIN HYUK LIM, DONGHYUN KIM, JIEUN LEE
  • Publication number: 20220363948
    Abstract: The present disclosure relates to a polishing composition for a semiconductor process that may increase a polishing rate of a boron-doped polysilicon layer, improve polishing selectivity, prevent a defect of a wafer that may occur in a polishing process, and improving surface roughness of the wafer, and a method for polishing a substrate by using the same. In addition, the present disclosure relates to a method for manufacturing a polished substrate by using a polishing composition for a semiconductor process.
    Type: Application
    Filed: May 1, 2022
    Publication date: November 17, 2022
    Inventors: Seung Chul HONG, Deok Su HAN, Jang Kuk KWON, Han Teo PARK
  • Publication number: 20220325139
    Abstract: The present disclosure relates to a polishing composition for a semiconductor process, which prevents polishing particles from being re-adsorbed on a wafer during a polishing process to prevent wafer defects, and improves polishing rate, selectivity, and dispersibility. In addition, when a semiconductor device is manufactured by applying the polishing composition for a semiconductor process, polarization is possible with an excellent selectivity even on a surface on which all of tungsten, a diffusion barrier layer, and an insulating layer exist.
    Type: Application
    Filed: April 4, 2022
    Publication date: October 13, 2022
    Inventors: Seung Chul HONG, Deok Su HAN, Han Teo PARK, Jang Kuk KWON
  • Publication number: 20220220340
    Abstract: Provided is a composition for semiconductor processing including abrasive particles and at least one additive. The composition may exhibit excellent polishing performance by being applied to a process of polishing a semiconductor wafer, may minimize defects in a polishing target surface, may achieve flat polishing without a difference in flatness between a plurality of different layers when used to polish the externally exposed surfaces of the layers, and may be applied to polishing of the surface of a semiconductor wafer having a through silicon via (TSV). Also provided is a method of fabricating a semiconductor device using the composition.
    Type: Application
    Filed: January 6, 2022
    Publication date: July 14, 2022
    Inventors: Seung Chul Hong, Deok Su Han, Han Teo Park
  • Publication number: 20220208552
    Abstract: A semiconductor process polishing composition, and a polishing method of a substrate applied with a polishing composition are provided. The process provides a polishing composition improved in the polishing rate, selectivity and dispersibility, and provides a manufacturing method of a substrate that is polished by applying such a polishing composition for a semiconductor process.
    Type: Application
    Filed: December 28, 2021
    Publication date: June 30, 2022
    Applicant: SKC solmics Co., Ltd.
    Inventors: SEUNG CHUL HONG, DEOK SU HAN, HWAN CHUL KIM, HAN TEO PARK, HYEONG JU LEE
  • Patent number: 8840798
    Abstract: A slurry composition for chemical mechanical polishing, including 0.1% to 20% by weight of an aminosilane-surface treated polishing agent; 0.001% to 5% by weight of an additive selected from amino acids, amino acid derivatives, salts thereof, and combinations thereof; 0.0001% to 0.5% by weight of a corrosion inhibitor; and 0.01% to 5% by weight of an oxidizing agent, with the balance being a solvent, is provided. The slurry composition for chemical mechanical polishing has a conspicuously high polishing rate for silicon oxide films, is capable of selectively preventing the removal of silicon nitride films, does not cause an imbalance in polishing, gives an excellent degree of planarization, has excellent stability over time and dispersion stability, causes less generation of particles and scratches, and produces very satisfactory polished surfaces of barrier metal films and oxide films.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 23, 2014
    Assignee: Soulbrain Co., Ltd.
    Inventors: Deok-Su Han, Hwan-Chul Kim, Seok-Joo Kim, Hyu-Bum Park
  • Publication number: 20120156874
    Abstract: A slurry composition for chemical mechanical polishing, including 0.1% to 20% by weight of an aminosilane-surface treated polishing agent; 0.001% to 5% by weight of an additive selected from amino acids, amino acid derivatives, salts thereof, and combinations thereof; 0.0001% to 0.5% by weight of a corrosion inhibitor; and 0.01% to 5% by weight of an oxidizing agent, with the balance being a solvent, is provided. The slurry composition for chemical mechanical polishing has a conspicuously high polishing rate for silicon oxide films, is capable of selectively preventing the removal of silicon nitride films, does not cause an imbalance in polishing, gives an excellent degree of planarization, has excellent stability over time and dispersion stability, causes less generation of particles and scratches, and produces very satisfactory polished surfaces of barrier metal films and oxide films.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 21, 2012
    Applicant: Soulbrain Co., LTD
    Inventors: Deok-Su HAN, Hwan-Chul KIM, Seok-Joo KIM, Hyu-Bum PARK
  • Publication number: 20110045741
    Abstract: Disclosed is a chemical-mechanical polishing composition used in a process for chemical-mechanical polishing of silicon oxide layer having severe unevenness with large step-height. The composition includes abrasive particles of metal oxide; and at least one compound(s) selected from the group consisting of amino alcohols, hydroxycarboxylic acid having at least 3 of the total number of carboxylic acid group(s) and hydroxyl group(s) or their salts, or a mixture thereof. A polymeric organic acid, a preservative, a lubricant and a surfactant may be further contained. The composition shortens the vapor-deposition time of a layer to be polished, saves the raw material to be vapor-deposited, shortens the chemical-mechanical polishing time, and saves the slurry employed.
    Type: Application
    Filed: April 28, 2006
    Publication date: February 24, 2011
    Applicant: TECHNO SEMICHEM CO., LTD.
    Inventors: Jung-Ryul Ahn, Jong-Kwan Park, Seok-Ju Kim, Eun-Il Jeong, Deok-Su Han, Hyu-Bum Park, Kui-Jong Baek, Tae-Kyeong Lee
  • Publication number: 20100176335
    Abstract: The present invention relates to a CMP slurry composition for copper damascene process of semiconductor manufacturing process. The barrier CMP slurry composition for copper damascene process of the present invention does not include an oxidant, so that it exhibits excellent reproducibility of polishing performance, low etching speed, and adequate polishing speed for copper layer, silicon oxide film and Ta-based film. Thus, the slurry composition of the invention has such advantages as easy dishing or erosion removal, excellent dispersion stability, and low scratch level, making it excellent barrier CMP slurry composition for copper damascene process.
    Type: Application
    Filed: June 8, 2007
    Publication date: July 15, 2010
    Applicant: TECHNO SEMICHEM CO., LTD.
    Inventors: Seok-Ju Kim, Eun-Il Jeong, Deok-Su Han, Hyu-Bum Park
  • Publication number: 20090298289
    Abstract: The present invention relates to a novel slurry composition for copper polishing, comprising zeolite which is a porous crystalline material for CMP of copper film in a semiconductor manufacturing process. The slurry composition according to the present invention comprises zeolite, an oxidant and a polish promoting agent and may further comprise a corrosion inhibitor, a surfactant, an aminoalcohol, an antiseptic and a dispersion agent and pH is in a range of 1 to 7. The zeolite slurry according to the present invention has advantages of absorbing and removing metal cation generated in CMP process by using zeolite and having a low level of scratches as the zeolite has micropores therein and thus its hardness is low. The slurry composition using zeolite of the present invention is usable to both first and second step polishing of copper damascene process and particularly useful as the first step polishing slurry for copper.
    Type: Application
    Filed: March 29, 2007
    Publication date: December 3, 2009
    Applicant: TECHNO SEMICHEM CO., LTD.
    Inventors: Eun-Il Jeong, Hyu-Bum Park, Seok-Ju Kim, Deok-Su Han, Jung-Ryul Ahn, Jong-Kwan Park, Kui-Jong Baek