Abstract: A display device may include a pixel, a chip pad spaced apart from the pixel, a film pad spaced apart from the chip pad, a wiring connecting the chip pad and the film pad and including a first wiring layer and a second wiring layer disposed on the first wiring layer, and an organic insulation layer covering the chip pad and the wiring. A first groove may be defined in the second wiring layer, and a second groove corresponding to the first groove may be defined in the organic insulation layer.

Abstract: A display device includes a pixel circuit, a first line disposed on the pixel circuit and a second line disposed on a same layer as the first line. A light emitting element is disposed on the first line and the second line. A connection pattern is disposed on a same layer as the first line and the second line and is disposed between the first line and the second line. The connection pattern connects the pixel circuit and the light emitting element. The connection pattern has a polygonal shape including at least six sides. A first vertex of the connection pattern is positioned at a shortest distance from the first line to the connection pattern and portions of the connection pattern between the first vertex and adjacent vertices are positioned farther from the first line than the first vertex.

Abstract: A pixel includes an organic light emitting diode including an anode electrode and a cathode electrode; a driving transistor including an input electrode connected to a first node (FN), a control electrode connected to a second node, and an output electrode connected to a third node; a switching transistor to apply a data signal to the FN in response to a scan signal in a second period; a first initialization transistor to apply a first initialization voltage to the second node in response to an initialization control signal in a first period (FP); a second initialization transistor to apply a second initialization voltage having a voltage level different from the first initialization voltage to the anode electrode in response to the initialization control signal in the FP; and an on-bias transistor to apply a first driving voltage to the FN in response to an on-bias control signal in the FP.

Abstract: A display device includes a display area and a non-display area disposed around the display area and including a pad area. The display device includes a resistance checker disposed in the non-display area, resistance test pads disposed in the pad area, resistance test lines connecting the resistance checker with the resistance test pad, and crack test lines disposed on the outer side of the resistance checker. The resistance test lines intersect the crack test lines in a plan view.

Abstract: An organic light-emitting display device is provided. The organic light-emitting display device comprises a plurality of data lines, first and second sensing lines disposed on a same layer as the data lines, an insulating layer disposed on the data lines and the first and second sensing lines, and a power line disposed on the insulating layer. An area of overlap between the first sensing line and the power line is the same as an area of overlap between the second sensing line and the power line.

Abstract: A display device may include a pixel, a chip pad spaced apart from the pixel, a film pad spaced apart from the chip pad, a wiring connecting the chip pad and the film pad and including a first wiring layer and a second wiring layer disposed on the first wiring layer, and an organic insulation layer covering the chip pad and the wiring. A first groove may be defined in the second wiring layer, and a second groove corresponding to the first groove may be defined in the organic insulation layer.

Abstract: A display panel including a first pixel row comprising a plurality of first pixels arranged in a first direction; a second pixel row comprising a plurality of second pixels, each of the plurality of second pixels overlaps each of the plurality of first pixels in a second direction crossing the first direction, and a third pixel, the third pixel does not overlap the plurality of first pixels in the second direction, wherein the plurality of second pixels and the third pixel being arranged in the first direction; and a first vertical line comprising a first sub-line, the first sub-line is extended in the second direction and is connected to the third pixel, and a second sub-line, the second sub-line is extended from an end portion of the first sub-line in a direction away from the plurality of first pixels at a first angle relative to the second direction.

Abstract: A touch sensor including a base layer including a sensing area and a non-sensing area, first and second sensor patterns disposed in the sensing area and arranged along first and second directions, respectively, first bridge patterns arranged along the first direction, second bridge patterns arranged along the second direction, and sensing lines disposed in the non-sensing area and connected to each of the first and second sensor patterns, in which each of the sensing lines includes a first metal layer and a second metal layer with an insulating layer interposed therebetween, each of the sensing lines has a first portion and a second portion, the second portion corresponding to at least one of the first bridge patterns disposed at a corner portion of the sensing area, and the second portion of at least one of the sensing lines has a single layer structure including only the second metal layer.

Abstract: A display device includes first and second signal lines, first and second signal pads, and a pad insulating layer overlapping with the first and second signal lines. The first signal pad includes an intermediate conductive pattern overlapping with and connected to an end portion of the first signal line, and an upper conductive pattern on the intermediate conductive pattern, the upper conductive pattern being exposed through the pad insulating layer. The intermediate conductive pattern includes a first portion overlapping with the end portion of the first signal line, and a second portion between the end portion of the first signal line and an end portion of the second signal line and extending from the first portion. The upper conductive pattern is connected to the second portion of the intermediate conductive pattern.

Abstract: An electronic panel may include a plurality of sensing electrodes and a plurality of sensing lines. The sensing lines may include a plurality of first group sensing lines and a plurality of second group sensing lines, which are spaced apart from each other in a specific direction and are alternately arranged with respect to each other. Each of the first group sensing lines and the second group sensing lines may include a first pattern layer and a second pattern layer, which are spaced apart from each other with an insulating layer interposed therebetween and are coupled to each other through the insulating layer. Each of the first group sensing lines may include a first pattern layer in a specific region, and each of the second group sensing lines may include a second pattern layer in the specific region.

Abstract: A stage circuit including an input unit controlling voltages of a first node and a second node by using a shift pulse or a gate start pulse input to a first input terminal, a first clock signal input to a second input terminal, a second clock signal input to a third input terminal, a first power supply input to a first power supply input terminal and a second power supply input to a second power supply input terminal, and a first output unit receiving a third clock signal from a fourth input terminal and the second power supply from the second power supply input terminal and outputting a high-level scan signal to a first output terminal corresponding to the voltages of the first node and the second node.

Abstract: A pixel includes an organic light emitting diode including an anode electrode and a cathode electrode; a driving transistor including an input electrode connected to a first node (FN), a control electrode connected to a second node, and an output electrode connected to a third node; a switching transistor to apply a data signal to the FN in response to a scan signal in a second period; a first initialization transistor to apply a first initialization voltage to the second node in response to an initialization control signal in a first period (FP); a second initialization transistor to apply a second initialization voltage having a voltage level different from the first initialization voltage to the anode electrode in response to the initialization control signal in the FP; and an on-bias transistor to apply a first driving voltage to the FN in response to an on-bias control signal in the FP.

Abstract: A display panel including a first pixel row comprising a plurality of first pixels arranged in a first direction; a second pixel row comprising a plurality of second pixels, each of the plurality of second pixels overlaps each of the plurality of first pixels in a second direction crossing the first direction, and a third pixel, the third pixel does not overlap the plurality of first pixels in the second direction, wherein the plurality of second pixels and the third pixel being arranged in the first direction; and a first vertical line comprising a first sub-line, the first sub-line is extended in the second direction and is connected to the third pixel, and a second sub-line, the second sub-line is extended from an end portion of the first sub-line in a direction away from the plurality of first pixels at a first angle relative to the second direction.

Abstract: A pixel includes: a first transistor connected between a data line and a first node; a second transistor connected between a first power source and a second node, the second transistor including a gate electrode connected to the first node; a third transistor connected between the first power source and the second transistor; a capacitor connected between the first node and the second node; an organic light emitting diode (OLED) connected between the second node and a second power source; and a fourth transistor including a second electrode connected to a cathode of the OLED.

Abstract: A display apparatus includes at least one pixel in a display area, a driving circuit disposed in a peripheral area adjacent the display area, the peripheral area including a first fan-out area and a second fan-out area disposed between the first fan-out area and the display area, a first fan-out line disposed in the first fan-out area and the second fan-out area, and fanned out from the first fan-out area to the display area, a second fan-out line disposed in the second fan-out area, and fanned out from the second fan-out area to the display area, a first horizontal power line disposed in the second fan-out area, and a second horizontal power line disposed in the first fan-out area, and electrically connected to the second fan-out line.

Abstract: A pixel includes first through sixth transistors and an organic light emitting diode. The first transistor includes a gate electrode connected to a first node, a first electrode, and a second electrode connected to a second node. The second transistor provides a data signal to the first node in response to a scan signal. The third transistor provides a first power voltage to the first transistor in response to an emission control signal. The fourth transistor provides a reference voltage to the first node in response to a voltage control signal. The fifth transistor provides the reference voltage to the first node in response to an initialization control signal. The sixth transistor provides an initialization voltage to the second node in response to the initialization control signal. The organic light emitting diode is connected between the second node and a second power voltage.

Abstract: An organic light emitting display (OLED) device includes a substrate including a light emitting region and a peripheral region. An auxiliary power supply wire is disposed in the peripheral region. A lower electrode is disposed in the light emitting region. A pixel defining layer, disposed on the substrate, exposes a portion of the lower electrode and a portion of the auxiliary power supply wire. A first common layer, disposed on the pixel defining layer and the lower electrode, exposes the auxiliary power supply wire. A light emitting structure is disposed on the first common layer. The light emitting structure exposes the auxiliary power supply wire. A second common layer is disposed on the light emitting structure, the second common layer covering the light emitting structure and exposing the auxiliary power supply wire. An upper electrode is disposed on the second common layer and contacts the auxiliary power supply wire.

Abstract: An organic light-emitting display device includes a substrate having a display area and a non-display area, a thin-film transistor (TFT) that includes a gate electrode and that is disposed in the display area of the substrate, a first scan line disposed in a same layer as the gate electrode that is connected to the gate electrode; and a second scan line disposed in a different layer from the first scan line that overlaps the first scan line, wherein the first scan line is connected to the second scan line in the non-display area of the substrate.

Abstract: A stage circuit including an input unit controlling voltages of a first node and a second node by using a shift pulse or a gate start pulse input to a first input terminal, a first clock signal input to a second input terminal, a second clock signal input to a third input terminal, a first power supply input to a first power supply input terminal and a second power supply input to a second power supply input terminal, and a first output unit receiving a third clock signal from a fourth input terminal and the second power supply from the second power supply input terminal and outputting a high-level scan signal to a first output terminal corresponding to the voltages of the first node and the second node.

Abstract: An organic light emitting display (OLED) device includes a substrate including a light emitting region and a peripheral region. An auxiliary power supply wire is disposed in the peripheral region. A lower electrode is disposed in the light emitting region. A pixel defining layer, disposed on the substrate, exposes a portion of the lower electrode and a portion of the auxiliary power supply wire. A first common layer, disposed on the pixel defining layer and the lower electrode, exposes the auxiliary power supply wire. A light emitting structure is disposed on the first common layer. The light emitting structure exposes the auxiliary power supply wire. A second common layer is disposed on the light emitting structure, the second common layer covering the light emitting structure and exposing the auxiliary power supply wire. An upper electrode is disposed on the second common layer and contacts the auxiliary power supply wire.