Patents by Inventor Deqi Zhu
Deqi Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11973868Abstract: Methods, machine readable media and systems for near-field electromagnetic simulation for side-channel emission analysis of an integrated circuit (IC) are described. In one embodiment, a method can include the following operations: simulating EM field strengths for a plurality of grid partitions of a circuit area of the IC based on a cryptographic work load applied to a model of the IC; identifying one or more of the grid partitions as a security sensitive region for the IC based on the EM field strengths, wherein one or more grid partitions outside of the security sensitive region are identified as non-security sensitive regions for the IC; and simulating EM fields for the IC to perform the EM side-channel emission analysis, wherein contributions of the EM fields from the non-security sensitive regions for the EM side-channel emission analysis are based on a linear superposition of wire currents in the non-security sensitive regions of the IC.Type: GrantFiled: September 22, 2020Date of Patent: April 30, 2024Assignee: ANSYS, INC.Inventors: Deqi Zhu, Norman Chang, Lang Lin, Dinesh Kumar Selvakumaran, Yu Lu
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Publication number: 20240119147Abstract: A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Deqi Zhu, Hua Chen, Jimin Wen, Lang Lin, Norman Chang, Dinesh Selvakumaran, Gang Ni
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Publication number: 20240078362Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Norman CHANG, Hsiming PAN, Jimin WEN, Deqi ZHU, Wenbo XIA, Akhilesh KUMAR, Wen-Tze CHUANG, En-Cih YANG, Karthik SRINIVASAN, Ying-Shiun LI
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Patent number: 11914931Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.Type: GrantFiled: December 30, 2019Date of Patent: February 27, 2024Assignee: ANSYS, INC.Inventors: Akhilesh Kumar, Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11880456Abstract: A method in one embodiment creates a model of an authentic IC for use in comparisons with counterfeit ICs. The model can be created by determining a first or initial set of points of interest (POIs) on the simulated physical (e.g., gate level) layout and simulating side channel leakage from each POI and then expanding the size of the POI and repeating the simulation and comparing successive simulation results (between successive sizes of POIs for a given POI) to determine if a solution for the size of the POI has converged. The final POIs are then processed in a simulation that can use multiple payloads (e.g., cryptographic data) over the entire set of final POIs, and the resulting data set can be used to create the model.Type: GrantFiled: August 13, 2021Date of Patent: January 23, 2024Assignee: ANSYS, INC.Inventors: Deqi Zhu, Hua Chen, Jimin Wen, Lang Lin, Norman Chang, Dinesh Selvakumaran, Gang Ni
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Patent number: 11853661Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: GrantFiled: May 20, 2022Date of Patent: December 26, 2023Assignee: ANSYS, INC.Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11599633Abstract: Methods, machine readable media and systems for performing side channel analysis are described. In one embodiment, a method can determine, from a gate level representation of a circuit in a layout on a die of an IC, a first set of paths through the circuit that process security related data during operation of the circuit, the circuit including a second set of paths that do not process security related data; and the method can further determine, in a simulation of power consumption in the first set of paths but not the second set of paths, power consumption values in the first set of paths to determine potential security leakage of the security related data in the circuit. The method can further determine, from the power consumption values, positions in the layout for inserting virtual probes on the die for use in measuring security metrics that indicate potential leakage of the security related data. The insertion of the virtual probes is relative to the actual simulated layout of the die.Type: GrantFiled: February 12, 2021Date of Patent: March 7, 2023Assignee: ANSYS, INC.Inventors: Lang Lin, Norman Chang, Joao Geada, Deqi Zhu, Dinesh Kumar Selvakumaran, Nitin Kumar Pundir
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Patent number: 11520960Abstract: Methods, machine readable media and systems for performing side channel analysis are described. In one embodiment, a method, performed on a data processing system, can receive input data that contains an RTL representation of a design of a circuit and then determine, from the input data, a set of registers that store security related data during operation of the circuit, wherein the set of registers are a subset of all of the registers in the design. The method then determines, in a simulation of power consumption of the set of registers in the RTL representation, security metrics that indicate a level of potential leakage of security related data such as secret or private cryptographic keys.Type: GrantFiled: March 15, 2021Date of Patent: December 6, 2022Assignee: ANSYS, INC.Inventors: Dinesh Kumar Selvakumaran, Allen Rubin Baker, Norman Chang, Lang Lin, Deqi Zhu, Arti Dwivedi, Preeti Gupta, Joao Geada
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Publication number: 20220277120Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: May 20, 2022Publication date: September 1, 2022Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11366947Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: GrantFiled: December 10, 2019Date of Patent: June 21, 2022Assignee: ANSYS, INC.Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 11301608Abstract: Methods, machine readable media and systems for simulating the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. In one embodiment, a method can include the following operations: performing a first dynamic voltage drop (DVD) simulation on a plurality of locations, distributed across an integrated circuit (IC), based on a physical model that specifies physical layout of components on the IC, the IC storing sensitive data in locations of the layout; performing an IC level side channel correlation analysis between each of the locations and the sensitive data based on the results of the first DVD simulation; and selecting, based upon the IC level side channel correlation analysis, a subset of the locations for further simulations to simulate leakage of the sensitive data. Other methods, media and systems are disclosed.Type: GrantFiled: September 4, 2020Date of Patent: April 12, 2022Assignee: ANSYS, INC.Inventors: Lang Lin, Dinesh Kumar Selvakumaran, Norman Chang, Calvin Chow, Deqi Zhu
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Patent number: 11288421Abstract: Computationally efficient methods of determining a transient supply current in a circuit are disclosed. The methods include offline simulation of circuit models to obtain time series of signal currents which are used in a dynamic simulation to calculate equivalent capacitances for a cell model of the circuit. The equivalent capacitances may be used in the simulation to compute estimates of noise current in a power distribution network.Type: GrantFiled: September 13, 2019Date of Patent: March 29, 2022Assignee: Ansys, Inc.Inventors: Deqi Zhu, Chao Jiao, Yu Lu, Xiaoqin Liu
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Publication number: 20220067255Abstract: Circuit design techniques can use a trained predictor to predict key dynamic current metrics (such as peak current, peak time, pulse width and total charge) for a gate in a circuit library, where the predictor has been trained over different combinations of different input transition slews and different output fanout models. A dynamic current model solver can be used for a gate in the cell library to derive waveforms (of current versus time) for the different combinations, and a predictor, such as a neural network, can be trained with the outputs from the solver for the different combinations. The trained predictor can be used in a runtime simulation to solve for the dynamic current demand model of the various gates in a circuit design (such as all of the gates in an integrated circuit). In one embodiment, adaptive clustering of the various instances of a gate may be used to reduce a plurality of such gates in a cluster to a representative gate that acts as a centroid instance of the gate in the cluster.Type: ApplicationFiled: August 28, 2020Publication date: March 3, 2022Inventors: Deqi Zhu, Yu Lu, Wei Zhou, Kunhua Ma, Norman Chang, Prabhas Ranjan Kumar, William Alan Mullen
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Publication number: 20220060327Abstract: Methods, machine readable media and systems for near-field electromagnetic simulation for side-channel emission analysis of an integrated circuit (IC) are described. In one embodiment, a method can include the following operations: simulating EM field strengths for a plurality of grid partitions of a circuit area of the IC based on a cryptographic work load applied to a model of the IC; identifying one or more of the grid partitions as a security sensitive region for the IC based on the EM field strengths, wherein one or more grid partitions outside of the security sensitive region are identified as non-security sensitive regions for the IC; and simulating EM fields for the IC to perform the EM side-channel emission analysis, wherein contributions of the EM fields from the non-security sensitive regions for the EM side-channel emission analysis are based on a linear superposition of wire currents in the non-security sensitive regions of the IC.Type: ApplicationFiled: September 22, 2020Publication date: February 24, 2022Inventors: Deqi Zhu, Norman Chang, Lang Lin, Dinesh Kumar Selvakumaran, Yu Lu
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Publication number: 20210224452Abstract: Methods, machine readable media and systems for simulating the leakage of sensitive data in an integrated circuit, such as cryptographic data or keys, are described. In one embodiment, a method can include the following operations: performing a first dynamic voltage drop (DVD) simulation on a plurality of locations, distributed across an integrated circuit (IC), based on a physical model that specifies physical layout of components on the IC, the IC storing sensitive data in locations of the layout; performing an IC level side channel correlation analysis between each of the locations and the sensitive data based on the results of the first DVD simulation; and selecting, based upon the IC level side channel correlation analysis, a subset of the locations for further simulations to simulate leakage of the sensitive data. Other methods, media and systems are disclosed.Type: ApplicationFiled: September 4, 2020Publication date: July 22, 2021Inventors: Lang Lin, Dinesh Kumar Selvakumaran, Norman Chang, Calvin Chow, Deqi Zhu
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Publication number: 20210200915Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. The methods can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC); performing a thermal simulation for each respective template of the IC based on a sequence of power patterns of tiles of the respective template; and training a neural network with a plurality of training data collected via thermal simulations performed for the templates of the IC. These systems and methods can use a machine learning predictor, that has been trained to determine a transient temperature rise across an entire IC, and then append the determined transient temperature rise to a system level thermal profile of the IC.Type: ApplicationFiled: December 30, 2019Publication date: July 1, 2021Inventors: Akhilesh Kumar, Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Publication number: 20210173983Abstract: Machine assisted systems and methods for enhancing the resolution of an IC thermal profile from a system analysis are described. These systems and methods can use a neural network based predictor, that has been trained to determine a temperature rise across an entire IC. The training of the predictor can include generating a representation of two or more templates identifying different portions of an integrated circuit (IC), each template associated with location parameters to position the template in the IC; performing thermal simulations for each respective template of the IC, each thermal simulation determining an output based on a power pattern of tiles of the respective template, the output indicating a change in temperature of a center tile of the respective template relative to a base temperature of the integrated circuit; and training a neural network.Type: ApplicationFiled: December 10, 2019Publication date: June 10, 2021Inventors: Norman Chang, Hsiming Pan, Jimin Wen, Deqi Zhu, Wenbo Xia, Akhilesh Kumar, Wen-Tze Chuang, En-Cih Yang, Karthik Srinivasan, Ying-Shiun Li
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Patent number: 10817631Abstract: Computer-implemented systems and methods are provided for modeling a charge pump. A relationship between an output voltage of the charge pump and a loading condition is determined. A frequency-domain analysis is performed at multiple frequencies to determine an impedance function representative of the charge pump's impedance at each of the multiple frequencies. A vector-fitting algorithm is applied to approximate the impedance function using a plurality of poles and residues. A circuit is synthesized based on the plurality of poles and residues. A model for the charge pump is generated, where the model includes the synthesized circuit and components that model the relationship between the output voltage and the loading condition.Type: GrantFiled: March 23, 2020Date of Patent: October 27, 2020Assignee: Ansys, Inc.Inventors: Deqi Zhu, Yi Cao, Shan Wan, Norman Chang
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Patent number: 10599799Abstract: Computer-implemented systems and methods for modeling low-dropout (LDO) regulators and charge pumps are provided. A relationship between an output voltage of an LDO regulator or charge pump and a loading condition is determined. A frequency-domain analysis is performed at multiple frequencies to determine an impedance function representative of an impedance of the LDO regulator or charge pump at each of the multiple frequencies. A vector-fitting algorithm is applied to approximate the impedance function using a plurality of poles and residues. A circuit is synthesized based on the plurality of poles and residues. A model for the LDO regulator or charge pump is generated, where the model includes the synthesized circuit and components that model the relationship between the output voltage and the loading condition.Type: GrantFiled: October 25, 2017Date of Patent: March 24, 2020Assignee: ANSYS, Inc.Inventors: Deqi Zhu, Yi Cao, Shan Wan, Norman Chang