Abstract: Systems and methods of the present disclosure are directed to portion-specific compression and optimization of machine-learned models. For example, a method for portion-specific compression and optimization of machine-learned models includes obtaining data descriptive of one or more respective sets of compression schemes for one or more model portions of a plurality of model portions of a machine-learned model. The method includes evaluating a cost function to respectively select one or more candidate compression schemes from the one or more sets of compression schemes. The method includes respectively applying the one or more candidate compression schemes to the one or more model portions to obtain a compressed machine-learned model comprising one or more compressed model portions that correspond to the one or more model portions.

Abstract: Aspects described herein relate to adaptive control channel detection in wireless communications. A signal-to-interference-and-noise ratio (SINR) of a signal received by a receiver comprising multiple sub-receivers is measured, wherein the SINR is filtered according to a signal combining technology. Based at least in part on the SINR, it is determined whether to utilize the signal combining technology in combining signals related to a channel received over the multiple sub-receivers.

Abstract: The present invention discloses a clock recovery circuit, an optical receiver, and a passive optical network device. In the clock recovery circuit provided by the embodiment of the present invention, a first signal indicating whether a data loss abnormality occurs in initial serial data is introduced at a side of a phase detector, and a phase adjustment control signal is output to a phase adjustor according to a state of the first signal; and the phase adjustor performs different types of phase adjustment according to a state of the initial serial data, so that a data sampler can recover an accurate clock when the initial serial data is normal and can implement smooth switching of output clock information in special cases such as initial serial data clock loss or recovery, and no great abrupt phase change occurs, thereby ensuring stable and reliable working of a system.

Abstract: The present invention discloses a clock recovery circuit, an optical receiver, and a passive optical network device. In the clock recovery circuit provided by the embodiment of the present invention, a first signal indicating whether a data loss abnormality occurs in initial serial data is introduced at a side of a phase detector, and a phase adjustment control signal is output to a phase adjustor according to a state of the first signal; and the phase adjustor performs different types of phase adjustment according to a state of the initial serial data, so that a data sampler can recover an accurate clock when the initial serial data is normal and can implement smooth switching of output clock information in special cases such as initial serial data clock loss or recovery, and no great abrupt phase change occurs, thereby ensuring stable and reliable working of a system.