Patents by Inventor Der'E Jan

Der'E Jan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050127516
    Abstract: The present invention relates to integrated circuits comprising a protective overcoat and thick copper connectors. According to one aspect of the inventions, vias in the protective overcoat are substantially filled with tungsten plugs, or plugs of another metal with a relatively low coefficient of thermal expansion. According to another aspect of the invention, large vias in the protective overcoat are replaced with arrays of smaller vias. The invention reduces the likelihood of device failures during temperature cycling tests. Also, the invention allows for smaller vias in the protective overcoat and removal of interconnect functions to the thick copper layer.
    Type: Application
    Filed: December 12, 2003
    Publication date: June 16, 2005
    Inventors: Betty Mercer, Alec Morton, Byron Williams, Laurinda Ng, C. Thompson, Der-E Jan, Sunny Lee, Phuong-Lan Thi Tran
  • Publication number: 20040150065
    Abstract: In one embodiment of the present invention, a contact structure of a semiconductor device within an integrated circuit includes an active region, the active region having been defined using a mask provided on a substrate. The contact structure further includes an isolation region adjacent the active region and including a field oxide: the field oxide having been grown by exposure of the substrate to a thermal process and an oxygen-containing gas; a film having been formed on a top surface of the mask during exposure to the thermal process and oxygen-containing gas; a dry etching process having been performed to substantially remove the film from the top surface of the mask and to remove a top portion of the field oxide in the isolation region; and a wet etching process having been performed to substantially remove any portion of the mask remaining after the dry etching process.
    Type: Application
    Filed: January 20, 2004
    Publication date: August 5, 2004
    Inventors: Der-E Jan, Binghua Hu, Betty Shu Mercer, Pushpa Mahalingam, Asadd M. Hosein, John Kenneth Arch, C. Matthew Thompson
  • Publication number: 20040007755
    Abstract: In one embodiment of the present invention, a contact structure of a semiconductor device within an integrated circuit includes an active region, the active region having been defined using a mask provided on a substrate. The contact structure further includes an isolation region adjacent the active region and including a field oxide: the field oxide having been grown by exposure of the substrate to a thermal process and an oxygen-containing gas; a film having been formed on a top surface of the mask during exposure to the thermal process and oxygen-containing gas; a dry etching process having been performed to substantially remove the film from the top surface of the mask and to remove a top portion of the field oxide in the isolation region; and a wet etching process having been performed to substantially remove any portion of the mask remaining after the dry etching process.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 15, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Der-E Jan, Binghua Hu, Betty Shu Mercer, Pushpa Mahalingam, Asadd M. Hosein, John Kenneth Arch, C. Matthew Thompson
  • Patent number: 6287983
    Abstract: A nitride wet etch in which liquid TEOS is flowed directly into the hot phosphoric acid bath before wafer etching begins. This preloads the bath chemistry with silicate ions, and thus helps assure very high selectivity to silicon oxides.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: September 11, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Der'E Jan, Thomas M. Parrill, Brian K. Kirkpatrick
  • Patent number: 6228741
    Abstract: A method is given for removing excess oxide from active areas after shallow trench isolation, without the use of chemical-mechanical polishing. A nitride mask protects active areas during the etch of isolation trenches. The trenches are filled with oxide, using high density plasma deposition, which simultaneously etches, providing a sloping contour around the isolation trenches. A further layer of nitride is used to provide a cap over the trench which seals to the underlying layer of nitride. The cap layer of nitride receives a patterned etch to remove the cap only over the active areas. This allows a selective etch to remove the excess oxide, which can be followed by a selective etch to remove the nitride layers.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: May 8, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Shawn T. Walsh, John E. Campbell, James B. Friedmann, Thomas M. Parrill, Der'E Jan, Joshua J. Robbins, Byron T. Ahlburn, Sue Ellen Crank
  • Patent number: 5531900
    Abstract: There is provided a filter medium comprising a microporous polyvinylidene fluoride membrane and a polymer containing a positively charged organic phosphonium compound grafted to the membrane in a concentration sufficient to provide a surface of said membrane with a positive charge such that there is minimal susceptibility to the extraction of said polymer. The polymer may also contain an acrylate or methacrylate. There is also provided a method for ultrapurifying a liquid and an ultrapurifying system for water.
    Type: Grant
    Filed: July 7, 1994
    Date of Patent: July 2, 1996
    Assignee: University of Arizona
    Inventors: Srini Raghavan, Der'e Jan, Raghunath Chilkunda