Abstract: According to some embodiments, a load powering circuit includes a power circuit having a power semiconductor device, a mirror circuit connected to power semiconductor device and configured to generate a mirror current signal based on current flowing through the power semiconductor device, and a drain switch having an input connected to a drain of the power semiconductor device, and a driver circuit having an amplifier having a first input terminal and a second input terminal connected to the mirror circuit, and a gate control terminal connected to the power semiconductor device, the mirror circuit, and the drain switch, wherein the drain switch has an output connected to a negative reference terminal of the amplifier, and a voltage supply terminal is connected to a positive reference terminal of the amplifier.

Abstract: A power electronics device includes first and second semiconductor dies. The first die includes: a main GaN power transistor; a first GaN current sense transistor having a source electrically connected to a second current sense terminal; a second GaN current sense transistor; a diode device electrically connected in series between the drains of the main GaN power transistor and second GaN current sense transistor; and a voltage protection device electrically connecting the drain of the second GaN current sense transistor to a first current sense terminal. The second die includes current sense and short circuit detection circuits electrically connected to the current sense terminals. The short circuit detection circuit detects when the drain current of the main GaN power transistor exceeds a predetermined value and when the main GaN power transistor is in saturation.

Abstract: According to some embodiments, a load powering circuit includes a power circuit having a power semiconductor device, a mirror circuit connected to power semiconductor device and configured to generate a mirror current signal based on current flowing through the power semiconductor device, and a drain switch having an input connected to a drain of the power semiconductor device, and a driver circuit having an amplifier having a first input terminal and a second input terminal connected to the mirror circuit, and a gate control terminal connected to the power semiconductor device, the mirror circuit, and the drain switch, wherein the drain switch has an output connected to a negative reference terminal of the amplifier, and a voltage supply terminal is connected to a positive reference terminal of the amplifier.

Abstract: An apparatus as discussed herein includes: a first circuit node coupling a first resistor and a second resistor in series between an input voltage source and a reference voltage source; current mirror circuitry coupled to the first circuit node, the current mirror circuitry operative to: i) produce a first mirror current based a first current conveyed through the first resistor, and ii) produce a second mirror current based on a second current conveyed through the second resistor; and measurement circuitry operative to determine resistances of the first resistor and the second resistor via various techniques.

Abstract: An isolated DC/DC converter includes: a transformer having a primary side and a secondary side; an inverter configured to change a DC input voltage (Vin) to an AC current for energizing the primary side of the transformer; a capacitor in series with the primary side of the transformer; and a controller configured to operate the inverter in a first mode such that the capacitor pre-charges to |Vin| before the controller receives a turn ON command, the capacitor charges to X*|Vin| during a first part of a first switching cycle after the controller receives the turn ON command where X>1, and the capacitor voltage resonates with a magnetizing inductance of the primary side of the transformer during a second part of the first switching cycle. A power electronics device that includes the isolated DC/DC converter is also described.

Abstract: A gate driver circuit and a corresponding gate driver system is presented. The gate driver circuit may be configured to drive a gallium nitride GaN transistor. The gate driver circuit may comprise a communication interface configured to receive a gate driver parameter. The communication interface may be an asynchronous serial communication interface, such as e.g. an UART communication interface. The gate driver parameter may be forwarded from one gate driver circuit to the next using the asynchronous serial communication protocol. One or more digital isolators may be coupled between the gate driver circuits.

Abstract: A power electronics device includes first and second semiconductor dies. The first die includes: a main GaN power transistor; a first GaN current sense transistor having a source electrically connected to a second current sense terminal; a second GaN current sense transistor; a diode device electrically connected in series between the drains of the main GaN power transistor and second GaN current sense transistor; and a voltage protection device electrically connecting the drain of the second GaN current sense transistor to a first current sense terminal. The second die includes current sense and short circuit detection circuits electrically connected to the current sense terminals. The short circuit detection circuit detects when the drain current of the main GaN power transistor exceeds a predetermined value and when the main GaN power transistor is in saturation.

Abstract: A power stage includes: a first transformer; a second transformer; a third transformer; a GaN (gallium nitride) enhancement mode power transistor configured to conduct a load current when driven by a gate current derived from energy transferred by the first transformer; a GaN depletion mode transistor configured to turn off the GaN enhancement mode power transistor absent a threshold voltage applied across a gate and a source of the GaN depletion mode transistor; a voltage clamping device or circuit configured to turn off the GaN depletion mode transistor when reverse biased by a bias current derived from energy transferred by the second transformer; and a GaN enhancement mode transistor configured to turn on the GaN depletion mode transistor when driven by a gate current derived from energy transferred by the third transformer.

Abstract: A voltage converter is provided. The voltage converter comprises a switching circuit that includes a first pair of switches and a second pair of switches. The voltage converter comprises a transformer having a magnetizing inductance and a leakage inductance that are a function of a windings ratio of the transformer. The voltage converter comprises a capacitor coupled to the transformer and the switching circuit. The voltage converter comprises a switch control circuit configured to generate a frequency for controlling the first pair of switches and the second pair of switches. The frequency is set of a value to control the pairs of switches so that a peak capacitor voltage of the capacitor is a factor of an output voltage of the voltage converter and the windings ratio of the transformer.

Abstract: Current sense circuitry includes: a current mirror circuit for sensing a power transistor current; a capacitor directly connected to the current mirror circuit at a first node; and a comparator circuit having a first input electrically connected to an input terminal of the current mirror circuit, a second input electrically connected to a drain or source terminal of the power transistor, and an output that is in a first state when a voltage at the first input is higher than a voltage at the second input and in a second state when the voltage at the first input is lower than the voltage at the second input. Current is sourced to the first node if the power transistor is on and the comparator output is in the second state, and sunk from the first node if the power transistor is on and the comparator output is in the first state.

Abstract: An isolated DC/DC converter includes: a transformer having a primary side and a secondary side; an inverter configured to change a DC input voltage (Vin) to an AC current for energizing the primary side of the transformer; a capacitor in series with the primary side of the transformer; and a controller configured to operate the inverter in a first mode such that the capacitor pre-charges to |Vin| before the controller receives a turn ON command, the capacitor charges to X*|Vin| during a first part of a first switching cycle after the controller receives the turn ON command where X>1, and the capacitor voltage resonates with a magnetizing inductance of the primary side of the transformer during a second part of the first switching cycle. A power electronics device that includes the isolated DC/DC converter is also described.

Abstract: Current sense circuitry includes: a current mirror circuit for sensing a power transistor current; a capacitor directly connected to the current mirror circuit at a first node; and a comparator circuit having a first input electrically connected to an input terminal of the current mirror circuit, a second input electrically connected to a drain or source terminal of the power transistor, and an output that is in a first state when a voltage at the first input is higher than a voltage at the second input and in a second state when the voltage at the first input is lower than the voltage at the second input. Current is sourced to the first node if the power transistor is on and the comparator output is in the second state, and sunk from the first node if the power transistor is on and the comparator output is in the first state.

Abstract: A GaN (gallium nitride) die comprises: a first current sense terminal; a second current sense terminal; a main GaN power transistor; a GaN current sense transistor having a source electrically connected to a source of the main GaN power transistor; a diode device electrically connected in series between a drain of the main GaN power transistor and a drain of the GaN current sense transistor; a first voltage protection device electrically connecting the drain of the main GaN power transistor to the first sense terminal; and a second voltage protection device electrically connecting the drain of the GaN current sense transistor to the second sense terminal. A power electronics device that includes the GaN die is also described.

Abstract: A power stage includes: a first transformer; a second transformer; a third transformer; a GaN (gallium nitride) enhancement mode power transistor configured to conduct a load current when driven by a gate current derived from energy transferred by the first transformer; a GaN depletion mode transistor configured to turn off the GaN enhancement mode power transistor absent a threshold voltage applied across a gate and a source of the GaN depletion mode transistor; a voltage clamping device or circuit configured to turn off the GaN depletion mode transistor when reverse biased by a bias current derived from energy transferred by the second transformer; and a GaN enhancement mode transistor configured to turn on the GaN depletion mode transistor when driven by a gate current derived from energy transferred by the third transformer.

Abstract: A voltage converter is provided. The voltage converter comprises a switching circuit that includes a first pair of switches and a second pair of switches. The voltage converter comprises a transformer having a magnetizing inductance and a leakage inductance that are a function of a windings ratio of the transformer. The voltage converter comprises a capacitor coupled to the transformer and the switching circuit. The voltage converter comprises a switch control circuit configured to generate a frequency for controlling the first pair of switches and the second pair of switches. The frequency is set of a value to control the pairs of switches so that a peak capacitor voltage of the capacitor is a factor of an output voltage of the voltage converter and the windings ratio of the transformer.

Abstract: A circuit, which might be a full-bridge driver circuit, comprises a first PMOS high-side transistor device and a first NMOS low-side transistor device. The circuit further comprises turn-on circuitry configured to turn on the first PMOS high-side transistor device while simultaneously turning on the first NMOS low-side transistor device, by routing charge stored in a gate of the first PMOS high-side transistor device to a gate of the first NMOS low-side transistor device, to charge the gate of the first NMOS low-side transistor device.

Abstract: A parameter is compared to a lower threshold. The parameter is a gate-to-source voltage that is associated with a first transistor or a drain current that is associated with the first transistor. The first transistor is a field effect transistor, and the first transistor is a power device. If one or more of at least one supplemental transistor is coupled to the first transistor, and the parameter is less than the lower threshold, a plurality of switches is controlled to decouple at least one of the at least one supplemental transistor from the first transistor.

Abstract: In one example, a circuit includes a pass module, a first sensing module, a second sensing module, a decision module, and a control module. The pass module is configured to modify, based on a control signal, a resistance of a channel that electrically connects an input voltage and a load. The first sensing module is configured to generate a first sensed current. The second sensing module is configured to generate a second sensed current. The decision module is configured to generate a first decision current, generate a second decision current, and generate a composite sensed current based on a summation of the first decision current, the second decision current, the first sensed current, and the second sensed current. The control module is configured to generate the control signal based on the composite sensed current.

Abstract: An engine control system operates to communicate via a sensor link with one or more sensors in a vehicle based on different communication protocols. The sensors alter communication protocols for communicating via the sensor link to an engine control unit to reduce or increase a current consumption according to one or more predetermined criteria. In response to a predetermine threshold of one or more of the predetermined criteria being satisfied, a sensor communicates in a first communication protocol as opposed to a second communication protocol while operating to communicate a current signal or a modulated current signal.

Abstract: According to an embodiment, a system includes a switching regulator and an electrochemical storage test circuit. The switching regulator is coupled to a power supply input and configured to supply a regulated voltage to a regulated supply terminal that is configured to be coupled to a device. The electrochemical storage test circuit is configured to be coupled to an electrochemical storage unit. The electrochemical storage test circuit includes a bidirectional switch with a first switch terminal coupled to the regulated supply terminal, a second switch terminal configured to be coupled to the electrochemical storage unit, and a switch control terminal. The electrochemical storage test circuit also includes a built-in self-test (BIST) circuit configured to be coupled to the electrochemical storage unit and to the switch control terminal.