Patents by Inventor Derek Bowers
Derek Bowers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9252725Abstract: An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier.Type: GrantFiled: October 11, 2012Date of Patent: February 2, 2016Assignee: Analog Devices, Inc.Inventors: Moshe Gerstenhaber, Derek Bowers, Oljeta Bida Qirko, Chau C Tran
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Patent number: 8723603Abstract: Amplifiers with voltage and current feedback error correction are provided. In one embodiment, an amplifier includes a first input terminal, a second input terminal, an output terminal, a first stage, and a voltage feedback amplification circuit. The first stage can be used to generate first and second output currents, which can be used to control a voltage level of the output terminal. The first and second output currents can change in response to a current feedback signal and a differential input signal received between the first and second input terminals. The first stage can also generate a voltage feedback signal, which can be used by the voltage feedback amplification circuit to control a voltage level of the second input terminal based on a voltage level of the first input terminal.Type: GrantFiled: September 11, 2012Date of Patent: May 13, 2014Assignee: Analog Devices, Inc.Inventor: Derek Bowers
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Patent number: 8698544Abstract: A circuit for providing a DC output equal to the RMS value of a time-varying input signal, the circuit including: (i) an RMS-to-DC converter for producing the DC output and (ii) a high-order low-pass filter comprising at least first and second low-pass filters connected in series to cooperatively reduce at least one of ripple in the DC output, ripple in an denominator feedback loop, or DC error in the DC output.Type: GrantFiled: March 12, 2012Date of Patent: April 15, 2014Assignee: Analog Devices, Inc.Inventors: Derek Bowers, Lewis Counts, James G. Staley
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Publication number: 20140070886Abstract: Amplifiers with voltage and current feedback error correction are provided. In one embodiment, an amplifier includes a first input terminal, a second input terminal, an output terminal, a first stage, and a voltage feedback amplification circuit. The first stage can be used to generate first and second output currents, which can be used to control a voltage level of the output terminal. The first and second output currents can change in response to a current feedback signal and a differential input signal received between the first and second input terminals. The first stage can also generate a voltage feedback signal, which can be used by the voltage feedback amplification circuit to control a voltage level of the second input terminal based on a voltage level of the first input terminal.Type: ApplicationFiled: September 11, 2012Publication date: March 13, 2014Applicant: ANALOG DEVICES, INC.Inventor: Derek Bowers
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Publication number: 20130234775Abstract: A circuit for providing a DC output equal to the RMS value of a time-varying input signal, the circuit including: (i) an RMS-to-DC converter for producing the DC output and (ii) a high-order low-pass filter comprising at least first and second low-pass filters connected in series to cooperatively reduce at least one of ripple in the DC output, ripple in an denominator feedback loop, or DC error in the DC output.Type: ApplicationFiled: March 12, 2012Publication date: September 12, 2013Inventors: Derek Bowers, Lewis Counts, James G. Staley
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Patent number: 7808298Abstract: To compensate for changes in temperature, a pair of bipolar transistors is connected to a voltage divider and receives a differential voltage that varies with temperature. The voltage divider includes a set of resistors placed in parallel. The set of resistors has a resistance that changes with temperature. As the resistance changes with temperature, the differential voltage provided by the voltage divider changes in proportion to a change in thermal voltage.Type: GrantFiled: March 11, 2009Date of Patent: October 5, 2010Assignee: Analog Devices, Inc.Inventors: Eric Modica, Derek Bowers
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Publication number: 20100231287Abstract: To compensate for changes in temperature, a pair of bipolar transistors is connected to a voltage divider and receives a differential voltage that varies with temperature. The voltage divider includes a set of resistors placed in parallel. The set of resistors has a resistance that changes with temperature. As the resistance changes with temperature, the differential voltage provided by the voltage divider changes in proportion to a change in thermal voltage.Type: ApplicationFiled: March 11, 2009Publication date: September 16, 2010Applicant: Analog Devices, Inc.Inventors: Eric MODICA, Derek BOWERS
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Patent number: 7772926Abstract: In an output stage of an operational amplifier, first and second transistors each provide a collector current under quiescent conditions to first and second current sources. A resistor receives a portion of one the collector currents and produces a resistor voltage in response. An output transistor provides a quiescent current having a value calculated as a function of the resistor voltage and a base-emitter voltage of the second transistor.Type: GrantFiled: August 25, 2008Date of Patent: August 10, 2010Assignee: Analog Devices, Inc.Inventors: Eric Modica, Derek Bowers
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Publication number: 20100044835Abstract: In an output stage of an operational amplifier, first and second transistors each provide a collector current under quiescent conditions to first and second current sources. A resistor receives a portion of one the collector currents and produces a resistor voltage in response. An output transistor provides a quiescent current having a value calculated as a function of the resistor voltage and a base-emitter voltage of the second transistor.Type: ApplicationFiled: August 25, 2008Publication date: February 25, 2010Applicant: ANALOG DEVICES, INC.Inventors: Eric Modica, Derek Bowers
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Patent number: 7609144Abstract: A thin film composition is made from silicon, an insulator such as alumina or silicon dioxide, and at least one additional material such as chromium, nickel, boron and/or carbon. These materials are combined to provide a thin film having a ? of at least 0.02 ?-cm (typically 0.02-1.0 ?-cm), and a TCR of less than ±1000 ppm/° C. (typically less than ±300 ppm/° C.). A sheet resistance of at least 20 k?/? may also be obtained. The resulting thin film is preferably at least 200 thick, to reduce surface scattering conduction currents.Type: GrantFiled: December 8, 2006Date of Patent: October 27, 2009Assignee: Analog Devices, Inc.Inventors: Michael Lee, Steven Wright, Philip Judge, Craig Wilson, Gregory Cestra, Derek Bowers
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Patent number: 7511939Abstract: A layered capacitor structure comprises two or more semiconductor/dielectric plates formed above an insulating surface which provides mechanical support, with the plates arranged in a vertical stack on the insulating surface. An insulating layer is on each plate, patterned and etched to provide an opening which allows the top of one plate to be in physical and electrical contact with the bottom of the subsequent plate. Contact openings are provided through the insulating layers, each of which provides access to a respective semiconductor layer and is insulated from any other semiconductor/dielectric plate. Electrical contacts through the contact openings provide electrical connections to respective semiconductor layers. The present structure can include as many stacked layers as needed to provide a desired total capacitance or range of capacitances.Type: GrantFiled: August 24, 2007Date of Patent: March 31, 2009Assignee: Analog Devices, Inc.Inventors: Craig Wilson, Michael Dunbar, Derek Bowers
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Patent number: 7414456Abstract: A constant ratio current source comprises a first current branch which includes a first transistor that conducts a current I1 from a first current input to a first node and a resistor R1 connected between the first node and a circuit common point, and a second current branch which includes a second transistor that conducts a current I2 from a second current input to a second node and a resistor R2 connected between the second node and the circuit common point. The current branches are arranged such that I2 varies with I1. A linear negative resistance circuit connected between the first and second nodes provides an apparent negative resistance that increases the differential output impedance at the first and second current inputs, such that the ratio of I2:I1 is maintained approximately constant for a varying differential voltage applied across the first and second current inputs.Type: GrantFiled: August 17, 2006Date of Patent: August 19, 2008Assignee: Analog Devices, Inc.Inventor: Derek Bowers
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Patent number: 7411231Abstract: The present invention provides a JFET which receives an additional implant during fabrication, which extends its drain region towards its source region, and/or its source region towards its drain region. The implant reduces the magnitude of the e-field that would otherwise arise at the drain/channel (and/or source/channel) junction for a given drain and/or source voltage, thereby reducing the severity of the gate current and breakdown problems associated with the e-field. The JFET's gate layer is preferably sized to have a width which provides respective gaps between the gate layer's lateral boundaries and the drain and/or source regions for each implant, with each implant implanted in a respective gap.Type: GrantFiled: December 1, 2006Date of Patent: August 12, 2008Assignee: Analog Devices, Inc.Inventors: Craig Wilson, Derek Bowers, Gregory K. Cestra
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Publication number: 20080136579Abstract: A thin film composition is made from silicon, an insulator such as alumina or silicon dioxide, and at least one additional material such as chromium, nickel, boron and/or carbon. These materials are combined to provide a thin film having a ? of at least 0.02 ?-cm (typically 0.02-1.0 ?-cm), and a TCR of less than ±1000 ppm/° C. (typically less than ±300 ppm/° C.). A sheet resistance of at least 20 k?/? may also be obtained. The resulting thin film is preferably at least 200 ? thick, to reduce surface scattering conduction currents.Type: ApplicationFiled: December 8, 2006Publication date: June 12, 2008Inventors: Michael Lee, Steven Wright, Philip Judge, Craig Wilson, Gregory Cestra, Derek Bowers
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Publication number: 20080062613Abstract: A layered capacitor structure comprises two or more semiconductor/dielectric plates formed above an insulating surface which provides mechanical support, with the plates arranged in a vertical stack on the insulating surface. An insulating layer is on each plate, patterned and etched to provide an opening which allows the top of one plate to be in physical and electrical contact with the bottom of the subsequent plate. Contact openings are provided through the insulating layers, each of which provides access to a respective semiconductor layer and is insulated from any other semiconductor/dielectric plate. Electrical contacts through the contact openings provide electrical connections to respective semiconductor layers. The present structure can include as many stacked layers as needed to provide a desired total capacitance or range of capacitances.Type: ApplicationFiled: August 24, 2007Publication date: March 13, 2008Inventors: Craig Wilson, Michael Dunbar, Derek Bowers
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Publication number: 20080042732Abstract: A constant ratio current source comprises a first current branch which includes a first transistor that conducts a current I1 from a first current input to a first node and a resistor R1 connected between the first node and a circuit common point, and a second current branch which includes a second transistor that conducts a current I2 from a second current input to a second node and a resistor R2 connected between the second node and the circuit common point. The current branches are arranged such that I2 varies with I1. A linear negative resistance circuit connected between the first and second nodes provides an apparent negative resistance that increases the differential output impedance at the first and second current inputs, such that the ratio of I2:I1 is maintained approximately constant for a varying differential voltage applied across the first and second current inputs.Type: ApplicationFiled: August 17, 2006Publication date: February 21, 2008Inventor: Derek Bowers
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Publication number: 20070252652Abstract: A multiple op amp IC with a single low noise op amp configuration comprises at least two op amp circuits fabricated on a common substrate. The IC can be configured such that the multiple op amps are connected in parallel to form a single op amp having output drive and input-referred noise characteristics which are superior to those of the constituent op amps. The IC can be fabricated with either first or second metallization patterns, with the first pattern providing multiple op amps with separate inputs and outputs, and the second pattern interconnecting the amplifiers to form a single op amp. The second pattern also preferably interconnects at least one set of corresponding high impedance nodes to prevent a difference voltage which might otherwise arise between the nodes due to component mismatches between the multiple op amps.Type: ApplicationFiled: May 1, 2006Publication date: November 1, 2007Inventor: Derek Bowers
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Publication number: 20070145410Abstract: The present invention provides a JFET which receives an additional implant during fabrication, which extends its drain region towards its source region, and/or its source region towards its drain region. The implant reduces the magnitude of the e-field that would otherwise arise at the drain/channel (and/or source/channel) junction for a given drain and/or source voltage, thereby reducing the severity of the gate current and breakdown problems associated with the e-field. The JFET's gate layer is preferably sized to have a width which provides respective gaps between the gate layer's lateral boundaries and the drain and/or source regions for each implant, with each implant implanted in a respective gap.Type: ApplicationFiled: December 1, 2006Publication date: June 28, 2007Inventors: Craig Wilson, Derek Bowers, Gregory K. Cestra
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Patent number: 6690193Abstract: A one-time end-user-programmable fuse array circuit suitable for providing a digital input to a programmable analog element such as a DAC. An end-user-specified digital bit pattern is conveyed to a programming circuit, which programs an array of data fuses in accordance with the specified pattern. A validation means indicates whether the states of the data fuses match the specified pattern. The programming circuit blows a “lock” fuse when the data fuses match the specified pattern, which prevents any additional data fuses from being programmed. The specified pattern and the states of the data fuses are multiplexed to a programmable analog element. Initially, the end-user can vary the pattern to achieve a desired result from the programmable element. When the desired result is achieved, the data fuses are blown, the resulting pattern is validated, and the lock fuse is blown—thereby providing a permanent trim signal.Type: GrantFiled: August 26, 2002Date of Patent: February 10, 2004Assignee: Analog Devices, Inc.Inventors: Walter Heinzer, Azita Soroushian-Ashe, Pak W. Kung, Derek Bowers
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Patent number: 6672355Abstract: A device for applying a non-circular adhesive label to a non-circular optical disc includes a disc support moveable between the first position supporting the disc in a spaced apart relationship with a label and a second position enabling contact between the label and the disc. An arm is provided and moveable with the disc support for compacting the disc and aligning the disc with a label as the disc is moved from the first position to the second position.Type: GrantFiled: March 28, 2002Date of Patent: January 6, 2004Assignee: Avery Dennison Corporate CenterInventors: Michael Hummell, Joseph Sandor, Bryan Pittman, Derek Bowers, Daisy S. Taw, Michael Kocheng Wu, Heather Anne Gareis