Patents by Inventor Derek C. Houghton

Derek C. Houghton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6756604
    Abstract: A bipolar transistor is disclosed that is produced using a sacrificial mesa disposed over a layer of Si and SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the Si and SiGe layer forming the transistor base. After an etching process, the sacrificial mesa is removed and the Si and SiGe layer is exposed, where an oppositely doped material is applied over top of the Si and SiGe layer to form an emitter. This makes it possible to realize a thin layer of Si and silicon germanium to serve as the transistor base. The transistor device formed using the sacrificial mesa results in the base layer Si and SiGe not being affected by a process of etching, as it otherwise would be using a conventional double-poly process, which results in a more repeatable bipolar transistor device yield.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: June 29, 2004
    Assignee: SiGe Semiconductor Inc.
    Inventors: Stephen J. Kovacic, Derek C. Houghton
  • Patent number: 6559021
    Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: May 6, 2003
    Assignee: SiGe Semiconductor Inc.
    Inventors: Derek C. Houghton, Hugues Lafontaine
  • Publication number: 20020061618
    Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.
    Type: Application
    Filed: February 1, 2002
    Publication date: May 23, 2002
    Inventors: Stephen J. Kovacic, Derek C. Houghton
  • Publication number: 20020052074
    Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.
    Type: Application
    Filed: November 20, 2001
    Publication date: May 2, 2002
    Inventors: Derek C. Houghton, Hugues Lafontaine
  • Patent number: 6346453
    Abstract: A method of producing a bipolar transistor includes the step of providing a sacrificial mesa over a layer of SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the SiGe layer forming the transistor base. After an etching process removes the sacrificial mesa and the SiGe layer is exposed, an oppositely doped material is applied over top of the SiGe layer to form an emitter. This makes it possible to realize a thin layer of silicon germanium to serve as the transistor base. This method prevents the base layer SiGe from being affected, as it otherwise would be using a conventional double-poly process.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: February 12, 2002
    Assignee: SiGe Microsystems Inc.
    Inventors: Stephen J. Kovacic, Derek C. Houghton