Patents by Inventor Derek Caselli

Derek Caselli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072145
    Abstract: Gate-all-around integrated circuit structures having pre-spacer-deposition cut gates are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires and a second vertical arrangement of horizontal nanowires. A first gate stack is over the first vertical arrangement of horizontal nanowires, and a second gate stack is over the second vertical arrangement of horizontal nanowires. An end of the second gate stack is spaced apart from an end of the first gate stack by a gap. The integrated circuit structure also includes a dielectric structure having a first portion providing a gate spacer along sidewalls of the first gate stack, a second portion providing a gate spacer along sidewalls of the second gate stack, and a third portion filling the gap, the third portion contiguous with the first and second portions.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: Megan BECK, Joseph BRICE, Ryan WOOD, Krishna T. MARLA, Derek CASELLI
  • Publication number: 20120318324
    Abstract: A solar cell assembly can be prepared having one or more laterally-arranged multiple bandgap (LAMB) solar cells and a dispersive concentrator positioned to provide light to a surface of each of the LAMB cells. As described herein, each LAMB cell comprises a plurality of laterally-arranged solar cells each having a different bandgap.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 20, 2012
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, Acting for and on behalf of Ariz
    Inventors: Cun-Zheng Ning, Derek Caselli