Patents by Inventor Derek Gochnour
Derek Gochnour has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220415943Abstract: Implementations of image sensor packages may include a plurality of microlenses coupled over a color filter array (CFA), a low refractive index layer directly coupled to and over the plurality of microlenses, an adhesive directly coupled to and over the low refractive index layer, and an optically transmissive cover directly coupled to and over the adhesive. Implementations may include no gap present between the optically transmissive cover and the plurality of microlenses.Type: ApplicationFiled: September 7, 2022Publication date: December 29, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Oswald L. SKEETE, Brian Anthony VAARTSTRA, Derek GOCHNOUR
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Patent number: 11462580Abstract: Implementations of image sensor packages may include a plurality of microlenses coupled over a color filter array (CFA), a low refractive index layer directly coupled to and over the plurality of microlenses, an adhesive directly coupled to and over the low refractive index layer, and an optically transmissive cover directly coupled to and over the adhesive. Implementations may include no gap present between the optically transmissive cover and the plurality of microlenses.Type: GrantFiled: June 27, 2019Date of Patent: October 4, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Oswald L. Skeete, Brian Anthony Vaartstra, Derek Gochnour
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Publication number: 20200411573Abstract: Implementations of image sensor packages may include a plurality of microlenses coupled over a color filter array (CFA), a low refractive index layer directly coupled to and over the plurality of microlenses, an adhesive directly coupled to and over the low refractive index layer, and an optically transmissive cover directly coupled to and over the adhesive. Implementations may include no gap present between the optically transmissive cover and the plurality of microlenses.Type: ApplicationFiled: June 27, 2019Publication date: December 31, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Oswald L. SKEETE, Brian Anthony VAARTSTRA, Derek GOCHNOUR
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Patent number: 10770492Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.Type: GrantFiled: August 3, 2018Date of Patent: September 8, 2020Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
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Publication number: 20180342549Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.Type: ApplicationFiled: August 3, 2018Publication date: November 29, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bingzhi SU, Derek GOCHNOUR, Larry KINSMAN
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Patent number: 10079254Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.Type: GrantFiled: August 11, 2017Date of Patent: September 18, 2018Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
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Publication number: 20180019275Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.Type: ApplicationFiled: August 11, 2017Publication date: January 18, 2018Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bingzhi SU, Derek GOCHNOUR, Larry KINSMAN
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Patent number: 9754983Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.Type: GrantFiled: July 14, 2016Date of Patent: September 5, 2017Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
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Publication number: 20160031707Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method for manufacturing microelectronic devices includes forming a stand-off layer over a plurality of microelectronic dies on a microfeature workpiece, removing selected portions of the stand-off layer to form a plurality of stand-offs on corresponding dies, cutting the workpiece to singulate the dies, attaching a first singulated die to a support member, and coupling a second die to the stand-off on the first singulated die.Type: ApplicationFiled: September 21, 2015Publication date: February 4, 2016Inventors: Jonathon G. Greenwood, Derek Gochnour
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Publication number: 20070045807Abstract: Microelectronic devices and methods for manufacturing microelectronic devices are disclosed herein. In one embodiment, a method for manufacturing microelectronic devices includes forming a stand-off layer over a plurality of microelectronic dies on a microfeature workpiece, removing selected portions of the stand-off layer to form a plurality of stand-offs on corresponding dies, cutting the workpiece to singulate the dies, attaching a first singulated die to a support member, and coupling a second die to the stand-off on the first singulated die.Type: ApplicationFiled: September 1, 2005Publication date: March 1, 2007Applicant: Micron Technology, Inc.Inventors: Jonathon Greenwood, Derek Gochnour
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Publication number: 20060168552Abstract: A method for fabricating semiconductor die packages and semiconductor die packages including a mounting substrate and dice attached thereto. The mounting substrate includes multiple die attach sites and a designator having substrate identification information. The die attach sites are evaluated and categorized as either good or defective die attach sites, wherein the evaluated information is saved in an electronic file as mapped information. A die is attached to the die attach sites in accord with the information, wherein known good dice are attached to the good die attach sites and known defective dice are attached to the defective die attach sites. The assembly is then encapsulated in a transfer molding operation.Type: ApplicationFiled: March 22, 2006Publication date: July 27, 2006Inventors: Warren Farnworth, Derek Gochnour
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Patent number: 7049840Abstract: An interconnect is provided for making electrical connections with a semiconductor die. The interconnect includes a substrate having integrally formed contact members, configured to electrically contact corresponding contact locations on the die. The interconnect also includes a pattern of conductors formed separately from the substrate, and then bonded to the substrate, in electrical communication with the contact members. The conductors can be mounted to a multi layered tape similar to TAB tape, or alternately bonded directly to the substrate. In addition, each conductor can include an opening aligned with a corresponding contact member, and filled with a conductive material, such as a conductive adhesive or solder. The conductive material electrically connects the contact members and conductors, and provides an expansion joint to allow expansion of the conductors without stressing the contact members.Type: GrantFiled: April 30, 1999Date of Patent: May 23, 2006Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Salman Akram, Warren M. Farnworth, Alan G. Wood, James M. Wark, Derek Gochnour
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Patent number: 7011532Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element.Type: GrantFiled: May 5, 2005Date of Patent: March 14, 2006Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Salman Akram, Derek Gochnour
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Publication number: 20050211236Abstract: A saw for dicing substrates, such as semiconductor wafers, that has one or more variable indexing capabilities and two or more blades. One of the blades may be moved laterally or vertically, independent of one or more other blades.Type: ApplicationFiled: May 25, 2005Publication date: September 29, 2005Inventors: Salman Akram, Derek Gochnour, Michael Hess, David Hembree
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Patent number: 6939145Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element.Type: GrantFiled: June 10, 2003Date of Patent: September 6, 2005Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Salman Akram, Derek Gochnour
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Publication number: 20050191876Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element.Type: ApplicationFiled: May 5, 2005Publication date: September 1, 2005Inventors: David Hembree, Salman Akram, Derek Gochnour
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Publication number: 20050087909Abstract: A method and apparatus for preventing board warpage during the application and curing or drying of liquid epoxies, or the like, on printed circuit boards using a clamping fixture assembly, which includes at least one clamping fixture support and at least one clamping fixture overlay. If desired, a plurality of printed circuit boards may be processed using an appropriate clamping fixture assembly. Furthermore, the clamping fixture maybe constructed so a slightbow or curvature thereof can counter either a convex or concave bow or curvature of the printed circuit board.Type: ApplicationFiled: December 13, 2004Publication date: April 28, 2005Inventors: Derek Gochnour, Leonard Mess
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Publication number: 20050007745Abstract: An apparatus and method of removably interconnecting a reduced-sized memory card with an extension member. A locking mechanism may be formed in a peripheral end portion of the reduced-sized memory card that may include an entry surface and a ledge. The extension member may include a biasing portion that slidably engages the entry surface and removable interconnects with the ledge. With this arrangement, the extension member may easily be secured and removed from the reduced-sized memory card, allowing easy interchangeability between a standard-sized socket of one electronic device and a reduced-sized socket of another electronic device.Type: ApplicationFiled: August 3, 2004Publication date: January 13, 2005Inventors: Derek Gochnour, Walter Moden, Michael Morrison
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Patent number: 6806493Abstract: A spring element used in a temporary package for testing semiconductors is provided. The spring element is compressed so as to press the semiconductor, either in the form of a bare semiconductor die or as part of a package, against an interconnect structure. The spring element is configured so that it provides sufficient pressure to keep the contacts on the semiconductor in electrical contact with the interconnect structure. Material is added and/or removed from the spring element so that it has the desired modulus of elasticity. The shape of the spring element may also be varied to change the modulus of elasticity, the spring constant, and the force transfer capabilities of the spring element. The spring element also includes conductive material to increase the thermal and electrical conductivity of the spring element.Type: GrantFiled: February 19, 1998Date of Patent: October 19, 2004Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Salman Akram, Derek Gochnour
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Patent number: 6730999Abstract: A chip carrier for temporarily connecting a semiconductor chip to a testing device. The chip carrier includes a substrate having a first set of contact points for electrically engaging the testing device and a second set of contact points to be connected with the contact elements of the semiconductor chip. The semiconductor chip is disposed on the substrate and is substantially covered by a cover member. One or more clips are in contact with the cover member and are used to secure the semiconductor chip in position. The clips have a first member removably attached to the substrate and a second member separated from the first member and in contact with the cover member. As the second member is displaced from an unstressed position, a force is generated by the clip and transferred to the cover member and the semiconductor chip. The chip carrier reliably secures the semiconductor chip while occupying a relatively small space over the semiconductor chip.Type: GrantFiled: August 24, 2001Date of Patent: May 4, 2004Assignee: Micron Technology, Inc.Inventors: Warren M. Farnworth, Derek Gochnour, Alan Wood