Patents by Inventor Derek Harnett

Derek Harnett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11675629
    Abstract: Methods, apparatus, systems and articles of manufacture to store and access multi-dimensional data are disclosed. An example apparatus includes a memory; a memory allocator to allocate part of the memory for storage of a multi-dimensional data object; and a storage element organizer to: separate the multi-dimensional data into storage elements; store the storage elements in the memory, the stored storage elements being selectively executable; store starting memory address locations for the storage elements in an array in the memory, the array to facilitate selectable access of data of the stored elements; store a pointer for the array into the memory.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: June 13, 2023
    Assignee: Movidius Limited
    Inventors: Fergal Connor, David Bernard, Niall Hanrahan, Derek Harnett
  • Publication number: 20220138016
    Abstract: Methods, apparatus, systems and articles of manufacture to store and access multi-dimensional data are disclosed. An example apparatus includes a memory; a memory allocator to allocate part of the memory for storage of a multi-dimensional data object; and a storage element organizer to: separate the multi-dimensional data into storage elements; store the storage elements in the memory, the stored storage elements being selectively executable; store starting memory address locations for the storage elements in an array in the memory, the array to facilitate selectable access of data of the stored elements; store a pointer for the array into the memory.
    Type: Application
    Filed: July 12, 2021
    Publication date: May 5, 2022
    Inventors: Fergal Connor, David Bernard, Niall Hanrahan, Derek Harnett
  • Patent number: 11061738
    Abstract: Methods, apparatus, systems and articles of manufacture to store and access multi-dimensional data are disclosed. An example apparatus includes a memory; a memory allocator to allocate part of the memory for storage of a multi-dimensional data object; and a storage element organizer to: separate the multi-dimensional data into storage elements; store the storage elements in the memory, the stored storage elements being selectively executable; store starting memory address locations for the storage elements in an array in the memory, the array to facilitate selectable access of data of the stored elements; store a pointer for the array into the memory.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: July 13, 2021
    Assignee: Movidius Limited
    Inventors: Fergal Connor, David Bernard, Niall Hanrahan, Derek Harnett
  • Publication number: 20200278888
    Abstract: Methods, apparatus, systems and articles of manufacture to store and access multi-dimensional data are disclosed. An example apparatus includes a memory; a memory allocator to allocate part of the memory for storage of a multi-dimensional data object; and a storage element organizer to: separate the multi-dimensional data into storage elements; store the storage elements in the memory, the stored storage elements being selectively executable; store starting memory address locations for the storage elements in an array in the memory, the array to facilitate selectable access of data of the stored elements; store a pointer for the array into the memory.
    Type: Application
    Filed: February 28, 2019
    Publication date: September 3, 2020
    Inventors: Fergal Connor, David Bernard, Niall Hanrahan, Derek Harnett
  • Patent number: 9330027
    Abstract: A system employs a white list of authorized transactions to control access to system registers. In an embodiment, the white list is loaded into filter registers during system boot. Routing logic monitors a logical interconnect fabric of the system for register access requests. The routing logic parses source, destination information from a request to index the white list. If the white list includes an entry corresponding to the processing entity indicated in the source information and the register indicated in the destination information, the routing logic will permit the requested access.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 3, 2016
    Assignee: Intel Corporation
    Inventors: Julien Carreno, Derek Harnett, Gordon J. Walsh
  • Publication number: 20140281321
    Abstract: A system employs a white list of authorized transactions to control access to system registers. In an embodiment, the white list is loaded into filter registers during system boot. Routing logic monitors a logical interconnect fabric of the system for register access requests. The routing logic parses source, destination information from a request to index the white list. If the white list includes an entry corresponding to the processing entity indicated in the source information and the register indicated in the destination information, the routing logic will permit the requested access.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Intel Corporation
    Inventors: Julien Carreno, Derek Harnett, Gordon J. Walsh