Patents by Inventor Derek J. Beattie

Derek J. Beattie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System in a package (SiP)
    Patent number: 9111647
    Abstract: A system in a package (SiP) includes a first semiconductor die having a nonvolatile memory and trim/repair circuitry, and a second semiconductor die having a volatile memory and trim/repair circuitry. The first and the second semiconductor die are in a same package. The nonvolatile memory of the first semiconductor die is configured to store trim/repair values for each of the first and the second semiconductor die. The trim/repair circuitries of the first and second semiconductor die are configured to, in response to a reset of the second semiconductor die, copy the trim/repair values from the nonvolatile memory of the first semiconductor die to the volatile memory of the second semiconductor die.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: August 18, 2015
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Gary L. Miller, Derek J. Beattie
  • SYSTEM IN A PACKAGE (SiP)
    Publication number: 20150179286
    Abstract: A system in a package (SiP) includes a first semiconductor die having a nonvolatile memory and trim/repair circuitry, and a second semiconductor die having a volatile memory and trim/repair circuitry. The first and the second semiconductor die are in a same package. The nonvolatile memory of the first semiconductor die is configured to store trim/repair values for each of the first and the second semiconductor die. The trim/repair circuitries of the first and second semiconductor die are configured to, in response to a reset of the second semiconductor die, copy the trim/repair values from the nonvolatile memory of the first semiconductor die to the volatile memory of the second semiconductor die.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Inventors: GARY L. MILLER, Derek J. Beattie
  • Non-volatile memory with controlled program/erase
    Patent number: 7397703
    Abstract: A method for programming/erasing a non-volatile memory (NVM) includes performing a program/erase operation on a portion of the NVM using a first set of parameters. The method further includes determining whether each cell in the portion of the NVM passes a first margin level, if not determining which one of a set of lower margin levels than the first margin level each cell in the portion of the NVM passes. The method further includes modifying at least one of the set of parameters associated with a subsequent program/erase operation for the portion of the NVM based on the determined one of the set of lower margin levels.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: July 8, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Martin L. Niset, Derek J. Beattie, Andrew E. Birnie, Alistair J. Gorman, Stephen McGinty