Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: Systems and methods may reduce or eliminate image artifacts due to a defective pixel of an electronic display. An electronic display may include pixels that respectively include a self-emissive element, pixel drive circuitry that supplies a pixel drive current to drive the self-emissive element, and signal routing circuitry that reduces or eliminates a visual artifact due to a defective pixel among the pixels. The signal routing circuitry may do this by turning off the self-emissive element, supplying image data from the pixel drive circuitry to a first adjacent pixel, or receiving image data from other pixel drive circuitry from the first adjacent pixel or a second adjacent pixel.

Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: A system may include a display driven using display driving circuitry to present an image via pixels. The display driving circuitry may include a sensor core compatible with one or more strain sensing circuits. The same sensor core may be used by a control system of the display to sense a stress applied to a strained region of a display using a current divider sensing circuit and/or a Wheatstone bridge sensing circuit.

Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Abstract: A system may include buffer circuitry that receives an input signal representative of image data for display via a pixel. The buffer circuitry may provide a first driving signal during a first frame of the image data to the pixel based on the input signal. The buffer circuitry may include slew booster circuitry. The slew booster circuitry may supply a voltage boost (e.g., additional voltage) to differential pair stage circuitry of the buffer circuit in response to a difference between the input signal and a second driving signal exceeding a threshold increase a rate of change of the input signal provided. The second driving signal may be provided to the pixel during a second frame of the image data preceding the first frame.

Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: Systems and methods may reduce or eliminate image artifacts due to a defective pixel of an electronic display. An electronic display may include pixels that respectively include a self-emissive element, pixel drive circuitry that supplies a pixel drive current to drive the self-emissive element, and signal routing circuitry that reduces or eliminates a visual artifact due to a defective pixel among the pixels. The signal routing circuitry may do this by turning off the self-emissive element, supplying image data from the pixel drive circuitry to a first adjacent pixel, or receiving image data from other pixel drive circuitry from the first adjacent pixel or a second adjacent pixel.

Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: The present disclosure relates to systems and methods for operating a control signal to communicate signals using a first antenna and a first frequency band in response to determining that intra-device operations are occurring or are expected to occur, that a first amount of energy received by the first antenna is less than a threshold amount of energy, and that the first antenna is unaffected by the intra-device operations. The control signal may also delay communication of the signals in response to determining that intra-device operations are occurring, and that first amount of energy is greater than or equal to the threshold amount of energy.

Abstract: A system may include an electronic display panel having multiple pixels for depicting image data and processing circuitry that may receive a first error value representative of a first difference between a first electrical signal measured at a first pixel of the multiple pixels and an expected electrical signal for the first pixel. The first electrical signal may be based on a test signal transmitted to the first pixel and the expected electrical signal may correspond to an expected response of the first pixel based on the test signal. The processing circuitry may filter the first error value to generate a first compensated error value and may filter the first error value based on the first compensated error value to generate a second compensated error value, where the second compensated error value may filter one or more effects of spatial crosstalk between one or more pixels near the first pixel.

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Abstract: An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Abstract: A system may include a display driven using display driving circuitry to present an image via pixels. The display driving circuitry may include a sensor core compatible with one or more strain sensing circuits. The same sensor core may be used by a control system of the display to sense a stress applied to a strained region of a display using a current divider sensing circuit and/or a Wheatstone bridge sensing circuit.

Abstract: A system includes a pixel that emits light based on a signal provided to the pixel. The system may also include a buffer circuit having a differential pair stage, a cascade stage, and an output stage. The differential pair stage may receive a common mode voltage signal via a first switch in response to the first switch receiving a first signal that causes the first switch to close. The differential pair stage may couple a capacitor to the output stage via a second switch that operate based on a second signal, such that the capacitor reduces an offset provided by one or more circuit components in the differential pair stage, the cascade stage, the output stage, or any combination thereof. The differential pair stage may output the common mode voltage to the pixel via the output stage in response to the first signal being present.

Abstract: An electronic device may include an electronic display having multiple display pixels. The display pixels may illuminate at a target luminance based at least in part on a first analog voltage signal. The electronic device may also include an electrical bus configured to generate multiple analog voltage signals including the first analog voltage signal, which is output on an output of the electrical bus. The electrical bus may include a digital to analog converter to generate at least some of the analog voltage signals and multiple output buffers to buffer the analog voltage signals. The outputs may be buffered by an output buffer of the output buffers.