Patents by Inventor Derek Rohde
Derek Rohde has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10585734Abstract: Fast invalidation in peripheral component interconnect (PCI) express (PCIe) address translation services (ATS) initially utilize a fast invalidation request to alert endpoints that an address is being invalidated with a fast invalidation synchronization command that causes the endpoints to flush through any residual read/write commands associated with any invalidated address and delete any associated address entries in an address translation cache (ATC). Each endpoint may send a synchronization complete acknowledgement to the host. Further, a tag having an incrementing identifier for each invalidation request may be used to determine if an endpoint has missed an invalidation request.Type: GrantFiled: December 18, 2018Date of Patent: March 10, 2020Assignee: Qualcomm IncorporatedInventors: James Lionel Panian, Derek Rohde
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Publication number: 20190205278Abstract: Fast invalidation in peripheral component interconnect (PCI) express (PCIe) address translation services (ATS) initially utilize a fast invalidation request to alert endpoints that an address is being invalidated with a fast invalidation synchronization command that causes the endpoints to flush through any residual read/write commands associated with any invalidated address and delete any associated address entries in an address translation cache (ATC). Each endpoint may send a synchronization complete acknowledgement to the host. Further, a tag having an incrementing identifier for each invalidation request may be used to determine if an endpoint has missed an invalidation request.Type: ApplicationFiled: December 18, 2018Publication date: July 4, 2019Inventors: James Lionel Panian, Derek Rohde
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Patent number: 8225004Abstract: Method and system for transmitting data using a network protocol and a storage protocol via an adapter is provided. The method includes receiving an input output control block (IOCB) from a host system for transferring data stored in a host system memory; acquiring data from the host system memory; copying a header template in a local memory of the adapter, wherein the header template is created by a driver executed by the host system; creating a header for the network protocol and a header for the storage protocol; wherein a first module for the adapter creates the network protocol packet header and the first modules uses an assist module to create the storage protocol packet header; and creating a packet to transfer a portion of the acquired data, wherein a packet size is based on a payload size for the storage.Type: GrantFiled: March 31, 2010Date of Patent: July 17, 2012Assignee: QLOGIC, CorporationInventor: Derek Rohde
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Patent number: 7924859Abstract: A method and system for transferring iSCSI protocol data units (“PDUs”) to a host system is provided. The system includes a host bus adapter with a TCP/IP offload engine. The HBA includes, a direct memory access engine operationally coupled to a pool of small buffers and a pool of large buffers, wherein an incoming PDU size is compared to the size of a small buffer and if the PDU fits in the small buffer, then the PDU is placed in the small buffer. If the incoming PDU size is compared to a large buffer size and if the incoming PDU size is less than the large buffer size then the incoming PDU is placed in the large buffer. If the coming PDU size is greater than a large buffer, then the incoming PDU is placed is more than one large buffer and a pointer to a list of large buffers storing the incoming PDU is placed in a small buffer.Type: GrantFiled: March 19, 2009Date of Patent: April 12, 2011Assignee: QLOGIC, CorporationInventors: Derek Rohde, Michael I. Thompson
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Patent number: 7761608Abstract: A system with a host bus adapter (“HBA”) having a TCP/IP offload engine is provided. The HBA includes logic for concurrently processing markers, data integrity fields (“DIFs”) and digests by using plural counters that count words in a data stream and individual routing bits are set for markers, DIFs and digests based on the plural counter values. When a counter reaches a certain threshold value, then locator bits are set for a field and the locator bits are forwarded with the data stream. A marker counter is incremented when each word in a data stream passes by the marker counter and markers can be inserted at a programmed interval. For DIF calculation an offset of a first byte in a DMA transfer and partial cyclic redundancy code value is seeded into a DIF location counter, which is incremented for each byte of data that passes by the DIF location counter.Type: GrantFiled: September 1, 2004Date of Patent: July 20, 2010Assignee: QLOGIC, CorporationInventors: Derek Rohde, Bruce A. Klemin, Michael I. Thompson
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Patent number: 7720064Abstract: Method and system for transmitting data using a network protocol and a storage protocol via an adapter is provided. The method includes receiving an input output control block (IOCB) from a host system for transferring data stored in a host system memory; acquiring data from the host system memory; copying a header template in a local memory of the adapter, wherein the header template is created by a driver executed by the host system; creating a header for the network protocol and a header for the storage protocol; wherein a first module for the adapter creates the network protocol packet header and the first modules uses an assist module to create the storage protocol packet header; and creating a packet to transfer a portion of the acquired data, wherein a packet size is based on a payload size for the storage.Type: GrantFiled: December 21, 2007Date of Patent: May 18, 2010Assignee: QLOGIC, CorporationInventor: Derek Rohde
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Publication number: 20090304016Abstract: A method and system for transferring iSCSI protocol data units (“PDUs”) to a host system is provided. The system includes a host bus adapter with a TCP/IP offload engine. The HBA includes, a direct memory access engine operationally coupled to a pool of small buffers and a pool of large buffers, wherein an incoming PDU size is compared to the size of a small buffer and if the PDU fits in the small buffer, then the PDU is placed in the small buffer. If the incoming PDU size is compared to a large buffer size and if the incoming PDU size is less than the large buffer size then the incoming PDU is placed in the large buffer. If the coming PDU size is greater than a large buffer, then the incoming PDU is placed is more than one large buffer and a pointer to a list of large buffers storing the incoming PDU is placed in a small buffer.Type: ApplicationFiled: March 19, 2009Publication date: December 10, 2009Inventors: Derek Rohde, Michael I, Thompson
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Patent number: 7522623Abstract: A method and system for transferring iSCSI protocol data units (“PDUs”) to a host system is provided. The HBA includes, a direct memory access engine operationally coupled to a pool of small buffers and a pool of large buffers, wherein an incoming PDU size is compared to the size of a small buffer and if the PDU fits in the small buffer, then the PDU is placed in the small buffer. The incoming PDU size is compared to a large buffer size and if the incoming PDU size is less than the large buffer size then the incoming PDU is placed in the large buffer. If the coming PDU size is greater than a large buffer, then the incoming PDU is placed is more than one large buffer and a pointer to a list of large buffers storing the incoming PDU is placed in a small buffer.Type: GrantFiled: September 1, 2004Date of Patent: April 21, 2009Assignee: QLOGIC, CorporationInventors: Derek Rohde, Michael I. Thompson
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Publication number: 20060047904Abstract: A system with a host bus adapter (“HBA”) having a TCP/IP offload engine is provided. The HBA includes logic for concurrently processing markers, data integrity fields (“DIFs”) and digests by using plural counters that count words in a data stream and individual routing bits are set for markers, DIFs and digests based on the plural counter values. When a counter reaches a certain threshold value, then locator bits are set for a field and the locator bits are forwarded with the data stream. A marker counter is incremented when each word in a data stream passes by the marker counter and markers can be inserted at a programmed interval. For DIF calculation an offset of a first byte in a DMA transfer and partial cyclic redundancy code value is seeded into a DIF location counter, which is incremented for each byte of data that passes by the DIF location counter.Type: ApplicationFiled: September 1, 2004Publication date: March 2, 2006Inventors: Derek Rohde, Bruce Klemin, Michael Thompson
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Publication number: 20060047868Abstract: A method and system for transferring iSCSI protocol data units (“PDUs”) to a host system is provided. The system includes a host bus adapter with a TCP/IP offload engine. The HBA includes, a direct memory access engine operationally coupled to a pool of small buffers and a pool of large buffers, wherein an incoming PDU size is compared to the size of a small buffer and if the PDU fits in the small buffer, then the PDU is placed in the small buffer. If the incoming PDU size is compared to a large buffer size and if the incoming PDU size is less than the large buffer size then the incoming PDU is placed in the large buffer. If the coming PDU size is greater than a large buffer, then the incoming PDU is placed is more than one large buffer and a pointer to a list of large buffers storing the incoming PDU is placed in a small buffer.Type: ApplicationFiled: September 1, 2004Publication date: March 2, 2006Inventors: Derek Rohde, Michael Thompson