Patents by Inventor Derek Wang
Derek Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260141278Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to efficient and parallelizable simulations of dynamic quantum circuits. For example, according to an embodiment, a system is provided. The system can comprise a memory that can store computer executable components. The system can further comprise a processor that can execute the computer executable components stored in the memory, where the computer executable components can comprise a storage component that can store a set of wave functions corresponding to a quantum system. The computer executable components can further comprise a simulation component that can execute, based on one or more wave functions of the set of wave functions, one or more simulation shots on a quantum computer.Type: ApplicationFiled: November 19, 2024Publication date: May 21, 2026Inventors: Derek Wang, Alireza Seif Tabrizi, Ali Javadiabhari
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Publication number: 20260127466Abstract: A method, system, and computer program product for improving transpilation of dynamic quantum circuits. Classical resources utilized by the dynamic quantum circuit are optimized during transpilation of the dynamic quantum circuit so as to reduce the classical resource requirements. Such optimization of the classical resources is based on optimizing the classical memory requirements, optimizing the classical processing time, and/or optimizing the classical information flow. Upon optimizing, during transpilation, the classical resources utilized by the dynamic quantum circuit, a set of classical instructions is generated based on the optimization of the classical resources. Such classical instructions are then compiled during the transpilation of the dynamic quantum circuit. As a result, there is an improved performance of the transpiled dynamic quantum circuit, including an improvement in the quantum computational performance.Type: ApplicationFiled: October 17, 2024Publication date: May 7, 2026Inventors: Derek Wang, Pedro Rivero Ramirez, Iskandar Sitdikov, Alireza Seif Tabrizi, Haimeng Zhang
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Publication number: 20260119947Abstract: A method, system and computer program product for visualizing and manipulating quantum computations across multiple layers of abstraction of a quantum stack. A quantum algorithm is decomposed to nodes and edges between the nodes, where each of the nodes uses at least one layer of the layers of abstraction of the quantum stack. Furthermore, each node of the graphical visualization corresponds to a computational task. Upon decomposing the quantum algorithm to nodes and edges, such nodes and edges are displayed. An aspect of the quantum algorithm is modified in response to editing a setting of a node, such as editing a setting in a control panel associated with the node. By manipulating one or more of these settings, an aspect of the quantum algorithm (e.g., QPU time) is modified. In this manner, quantum calculations across multiple layers of abstraction of the quantum stack can be visualized and manipulated.Type: ApplicationFiled: July 29, 2024Publication date: April 30, 2026Inventors: Derek Wang, Alireza Seif Tabrizi, Pedro Rivero Ramirez
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Publication number: 20260111773Abstract: A method, system, and computer program product for obscuring proprietary information encoded in quantum circuits. The target quantum circuit and the identification of the proprietary information of the target quantum circuit to be obscured are received. Examples of proprietary information include, but are not limited to, a circuit structure, a measurement outcome, an initial product state of qubits, and parameters to be bound in the target quantum circuit. The target quantum circuit is transformed into a power-attack resistant quantum circuit by encoding the proprietary information in virtual quantum gates which are not executed on quantum hardware whose logical effects are tracked classically. Such virtual quantum gates require no power. As a result, proprietary information encoded in the virtual quantum gates cannot be detected via a power side-channel attack. In this manner, proprietary information encoded in quantum circuits is prevented from being stolen by power side-channel attacks.Type: ApplicationFiled: October 17, 2024Publication date: April 23, 2026Inventors: Derek Wang, Ali Javadiabhari, Alireza Seif Tabrizi
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Publication number: 20260105347Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to multi-dimensional empirically adapted dynamical decoupling for dynamic circuits. For example, a system can comprise a memory that can store computer executable components and a processor that can execute at least one of the computer executable components that can obtain a graph of a quantum processor that represents qubit connectivity and collisions in the quantum processor. The computer executable components can further determine a first dynamical decoupling strategy for collision qubits. The computer executable components can further determine, based on the graph of the quantum processor, a second dynamical decoupling strategy for non-collision qubits through empirical learning. The computer executable components can further apply the first dynamical decoupling strategy and the second dynamical decoupling strategy to a quantum circuit.Type: ApplicationFiled: October 14, 2024Publication date: April 16, 2026Inventors: Helena Zhang, Christopher Tong, Swarnadeep Majumder, Derek Wang, Luke Colin Gene Govia, Bibek Pokharel
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Publication number: 20260087397Abstract: A method, system, and computer program product for performing qubit mapping taking into consideration crosstalk errors in dynamic quantum circuits. A cost function is adjusted by taking into consideration the estimated idle time and the measured crosstalk error of the dynamic quantum circuit. Such a cost function corresponds to a functional relationship between the cost and both the estimated idle time and the measured crosstalk error of the dynamic quantum circuit. The logical qubits of the dynamic quantum circuit are then mapped to the physical qubits on the quantum device based on the adjusted cost function. For example, the logical qubits of the dynamic quantum circuit are mapped to a particular layout of the physical qubits on the quantum device based on a particular value of the cost function. In this manner, qubit mapping is performed by taking into consideration the crosstalk errors in dynamic quantum circuits.Type: ApplicationFiled: September 19, 2024Publication date: March 26, 2026Inventors: Derek Wang, Elisa Doreen Bäumer, Alireza Seif Tabrizi
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Publication number: 20260073271Abstract: A system comprises a memory that stores computer executable components, and a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise an approximating component that generates an approximating unitary from an original unitary, the approximating unitary based on a symmetry of the original unitary and omitting a selected operator of an exponentiated sum of operators comprised by the original unitary, and a checking component that directs operation of a check quantum circuit at a quantum computer, the check quantum circuit based on a quantum circuit output of an operation of the approximating unitary at the quantum computer, resulting in a determination of a violation of the symmetry.Type: ApplicationFiled: September 12, 2024Publication date: March 12, 2026Inventors: Derek WANG, Yunseong NAM, Jonah EZEKIEL
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Publication number: 20260050815Abstract: Systems and techniques that facilitate scalable validation and optimization of quantum error mitigation computational workflows are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory that can execute the computer executable components stored in memory. The computer executable components can comprise an input component that receives a quantum error mitigation (QEM) configuration of a quantum circuit and a quantum execution backend; a quantum circuit conversion component that converts the quantum circuit into a classically simulable quantum circuit; a noise component that learns a simplified noise model of the quantum execution backend; and an evaluation component that validates or optimizes the QEM configuration over the classically simulable quantum circuit and the simplified noise model.Type: ApplicationFiled: August 13, 2024Publication date: February 19, 2026Inventors: Derek WANG, Haimeng ZHANG, Swarnadeep MAJUMDER, Pedro RIVERO RAMIREZ, Andrew EDDINS, Drew VANDETH, Minh TRAN, Kunal SHARMA, Zlatko Kristev MINEV, Nathan Don EARNEST-NOBLE
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Publication number: 20260030531Abstract: A method, system, and computer program product for visualizing information regarding both a quantum circuit and a quantum device. A qubit architecture (e.g., two-dimensional qubit architecture) of the quantum circuit is displayed depicting operational characteristics of the quantum device in a first circuit layer. Furthermore, one or more images of the qubit architecture of the quantum circuit are displayed as being propagated along a third dimension axis across one or more circuit layers plotted with circuit instructions. Additionally, an image of the qubit architecture of the quantum circuit is displayed in a final circuit layer depicting measurement information about the quantum circuit and the quantum device. In this manner, information about both the quantum circuit and the quantum device upon which it is executed may be effectively visualized.Type: ApplicationFiled: July 29, 2024Publication date: January 29, 2026Inventors: Derek Wang, Alireza Seif Tabrizi
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Patent number: 12481908Abstract: A method, system, and computer program product for runtime quantum error mitigation. Training data, which includes noisy expectation values and target expectation values (noiseless expectation values), is generated. A machine learning model is then trained using the training data to perform quantum error mitigation based on learning the relationships between target and noisy expectation values. That is, such a machine learning model is trained to generate target expectation values based on inputted noisy expectation values. Upon executing a quantum circuit on a quantum computer creating quantum results, quantum error mitigation is performed on the quantum results at runtime using the trained machine learning model. In this manner, there are significant savings in quantum execution time while improving the accuracy of the results in performing quantum error mitigation on quantum results at runtime without additional mitigation circuits.Type: GrantFiled: September 7, 2023Date of Patent: November 25, 2025Assignee: International Business Machines CorporationInventors: Iskandar Sitdikov, Haoran Liao, Seyed Alireza Seif Tabrizi, Zlatko Kristev Minev, Derek Wang
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Publication number: 20250232204Abstract: A method, system, and computer program product for implementing noise mitigation in dynamic quantum circuits. A condition in a dynamic quantum circuit is identified. A condition refers to a situation or circumstance used to identify or detect a source of noise in the dynamic quantum circuit that may result in an error occurring in the dynamic quantum circuit. For example, the condition may correspond to the idling times, spectator qubits, and idling qubits in cross-talk resistant states (quantum states and in the dynamic quantum circuit. Based on the identified condition, a context-dependent dynamical decoupling sequence is inserted in the dynamic quantum circuit. A context-dependent dynamical decoupling sequence refers to a dynamical decoupling sequence that is inserted in the dynamic quantum circuit based on the context, such as the occurrence of a particular operation (e.g., mid-circuit measurement, the occurrence of a feed-forward operation, the occurrence of qubit shuttling).Type: ApplicationFiled: January 11, 2024Publication date: July 17, 2025Inventors: Derek WANG, Patrick Julian Tassilo RALL, Edward Hong CHEN, Seyed Alireza SEIF TABRIZI, Maika TAKITA, Thomas ALEXANDER, Elisa Doreen BÄUMER, Swarnadeep MAJUMDER, Zlatko Kristev MINEV, Diego RISTÈ, Vinay TRIPATHI
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Publication number: 20250181945Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to buffers for streaming in quantum-centric supercomputing. A system can comprise a memory that can store computer-executable components. The system can further comprise a processor that can execute the computer-executable components stored in the memory, wherein the computer-executable components can comprise a receiver component that can receive, from a source node, a quantum input and a release criterion associated with the quantum input. The computer-executable components can further comprise a computation component that can perform a computation based on the quantum input, in a buffering environment, to generate a result that can meet the release criterion.Type: ApplicationFiled: December 1, 2023Publication date: June 5, 2025Inventors: Iskandar Sitdikov, Pedro Rivero Ramirez, Derek Wang
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Publication number: 20250117683Abstract: A method, system, and computer program product for contextually calibrating quantum hardware. One or more contextual calibrations are selected or identified to minimize a contextual cost function of a quantum circuit. Examples of such contextual calibrations include, but are not limited to, tuning the amplitude, tuning the frequency duration, tuning the envelopes, recalibrating the error correction for specific qubits, recalibrating the measurement discriminator (identifies the specific quantum state), etc. The quantum hardware used to perform an execution of the quantum circuit may then be calibrated using the selected or identified contextual calibration(s). By minimizing the contextual cost function, such as via specific calibrations (e.g., tuning frequency duration, tuning amplitude), the performance of a general quantum device for a particular quantum circuit can be improved.Type: ApplicationFiled: October 6, 2023Publication date: April 10, 2025Inventors: Seyed Alireza Seif Tabrizi, Derek Wang, Iskandar Sitdikov
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Publication number: 20250086492Abstract: A method, system, and computer program product for runtime quantum error mitigation. Training data, which includes noisy expectation values and target expectation values (noiseless expectation values), is generated. A machine learning model is then trained using the training data to perform quantum error mitigation based on learning the relationships between target and noisy expectation values. That is, such a machine learning model is trained to generate target expectation values based on inputted noisy expectation values. Upon executing a quantum circuit on a quantum computer creating quantum results, quantum error mitigation is performed on the quantum results at runtime using the trained machine learning model. In this manner, there are significant savings in quantum execution time while improving the accuracy of the results in performing quantum error mitigation on quantum results at runtime without additional mitigation circuits.Type: ApplicationFiled: September 7, 2023Publication date: March 13, 2025Inventors: Iskandar Sitdikov, Haoran Liao, Seyed Alireza Seif Tabrizi, Zlatko Kristev Minev, Derek Wang
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Patent number: 12198013Abstract: A method, system and computer program product for calibrating a quantum error mitigation technique with appropriate settings. Calibrations of the quantum error mitigation technique corresponding to combinations of noise factors and extrapolation functions that when applied to quantum circuits that represent the target quantum circuit achieve an expectation value that is close to a zero-noise value within a threshold degree of accuracy are saved. A calibration (combination of noise factors and an extrapolation function) is then selected from the saved calibrations based on the depth of the target quantum circuit. The quantum error mitigation technique is then calibrated based on the selected calibration. The calibrated quantum error mitigation technique is then performed on the target quantum circuit. In this manner, a quantum error mitigation technique is automatically calibrated with the appropriate settings to achieve a zero-noise value by the target quantum circuit without requiring multiple iterations.Type: GrantFiled: July 7, 2023Date of Patent: January 14, 2025Assignee: International Business Machines CorporationInventors: Derek Wang, Ritajit Majumdar, Pedro Rivero Ramirez
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Publication number: 20250013907Abstract: A method, system and computer program product for calibrating a quantum error mitigation technique with appropriate settings. Calibrations of the quantum error mitigation technique corresponding to combinations of noise factors and extrapolation functions that when applied to quantum circuits that represent the target quantum circuit achieve an expectation value that is close to a zero-noise value within a threshold degree of accuracy are saved. A calibration (combination of noise factors and an extrapolation function) is then selected from the saved calibrations based on the depth of the target quantum circuit. The quantum error mitigation technique is then calibrated based on the selected calibration. The calibrated quantum error mitigation technique is then performed on the target quantum circuit. In this manner, a quantum error mitigation technique is automatically calibrated with the appropriate settings to achieve a zero-noise value by the target quantum circuit without requiring multiple iterations.Type: ApplicationFiled: July 7, 2023Publication date: January 9, 2025Inventors: Derek Wang, Ritajit Majumdar, Pedro Rivero Ramirez
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Patent number: 10503671Abstract: The present teaching, which includes methods, systems and computer-readable media, relates to controlling access to a shared resource including, for example, a memory unit. The disclosed techniques may include receiving a configuration parameter relating to a relationship between read and write requests that are initiated by concurrent processes and stored in read and write queues, respectively, for accessing the shared resource. The techniques may further include determining, based on the configuration parameter, whether to allow a read request or a write request to be executed using the shared resource, and providing to a concurrent process access to the shared resource for executing the allowed read or write request. Further, upon a completion of executing the allowed read or write request, a return token on a return token queue different from the read and write queues may be received, the return token corresponding to the allowed read or write request.Type: GrantFiled: December 29, 2016Date of Patent: December 10, 2019Assignee: Oath Inc.Inventors: Jay Hobson, Derek Wang
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Patent number: 10203995Abstract: Methods and/or systems are provided that may be utilized to read from or write to a resource, such as a shared memory, for example.Type: GrantFiled: November 22, 2013Date of Patent: February 12, 2019Assignee: Excalibur IP, LLCInventors: Jay Hobson, Derek Wang
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Patent number: 10145282Abstract: A method for improving automobile exhaust is disclosed. A catalytic converter is cooled down. The outer surface of the catalytic converter is covered with an infrared thermal radiation material, or black anodizing is carried out on the outer surface. Therefore, the surface thermal radiation of the catalytic converter is improved, and the catalytic converter can be kept being operated under a normal working temperature.Type: GrantFiled: May 25, 2015Date of Patent: December 4, 2018Assignee: DONGGUAN CITY MAO SHENG ELECTRONIC ENTERPRISES CO., LTDInventor: Derek Wang
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Publication number: 20180191706Abstract: The present teaching, which includes methods, systems and computer-readable media, relates to controlling access to a shared resource including, for example, a memory unit. The disclosed techniques may include receiving a configuration parameter relating to a relationship between read and write requests that are initiated by concurrent processes and stored in read and write queues, respectively, for accessing the shared resource. The techniques may further include determining, based on the configuration parameter, whether to allow a read request or a write request to be executed using the shared resource, and providing to a concurrent process access to the shared resource for executing the allowed read or write request. Further, upon a completion of executing the allowed read or write request, a return token on a return token queue different from the read and write queues may be received, the return token corresponding to the allowed read or write request.Type: ApplicationFiled: December 29, 2016Publication date: July 5, 2018Inventors: Jay Hobson, Derek Wang