Abstract: A system wherein a Caller Application is enabled to reduce latency after a First Call to a Data Link Library after which a stub function provides direct access to a selected algorithm's work function for execution by a processor. A Hardware Abstraction Layer receives information from multiple CPU's to determine the appropriately compatible algorithm for the processor that is to be utilized.

Abstract: A method is disclosed for use in a multi-processor computer system having a multiplicity of peripherals coupled thereto. The disclosed method assigns interrupt vectors from the multiplicity of peripherals, and includes the steps of determining if an interrupt resource from a given peripheral has already been assigned, and if not; assigning an affinity and vector to this interrupt resource. Moreover, a determination is made if the affinity and vector assigned in the previous step are within the operational characteristics of the multi-processor computer system.

Abstract: An emulated computer system includes an instruction processor which directly executes a set of native instructions. Stored in a memory, which is coupled to the instruction processor, are a plurality of foreign user programs and a foreign operating system, each of which is a compilation of foreign instructions and data. Also stored in the memory is an emulator program which is a compilation of the native instructions that interprets the foreign instructions, and a native operating system which is a compilation of the native instructions under which the emulator program is run. To diagnose faults in this emulated computer system, a heterogeneous diagnostic program is provided in the memory, which is a compilation of the native instructions that reads the foreign user programs and foreign operating system from the memory and stores them in a reformatted form on a magnetic media.

Abstract: A performance regulator program monitors and controls in real time, the performance level which an application program achieves when it is executed on a digital computer. With this performance regulator program, any external units which are coupled to the computer are prevented from being overloaded by excessive performance in the application program. Also with this performance regulator program, several models of the application program can be easily generated such that each model achieves a different performance level.