Patents by Inventor Dermot O'keeffe

Dermot O'keeffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973498
    Abstract: Front-end circuits that combine inductive and capacitive sensing are described. In one embodiment, an apparatus includes a plurality of inductive elements, an inductive measurement circuit, and a frequency divider circuit. The inductive measurement circuit is to output a first signal with a first frequency. The first signal is associated with an inductance change of one of the inductive elements. A feedback circuit can maintain the sinusoidal operation of the first signal. The frequency divider circuit can generate a second signal with a second frequency that is lower than the first frequency.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: April 30, 2024
    Assignee: Cypress Semiconductor Corporation
    Inventors: Paul M. Walsh, Kofi Makinwa, Matheus Pimenta, Ça{hacek over (g)}ri Gürleyük, Dermot Macsweeney, Daniel O'Keeffe, Dennis Seguine
  • Publication number: 20170241939
    Abstract: Subject matter herein can include identifying a biochemical test strip assembly electrically, such as using the same test circuitry as can be used to perform an electrochemical measurement, without requiring use of optical techniques. The identification can include using information about a measured susceptance of an identification feature included as a portion of the test strip assembly. The identification can be used by test circuitry to select test parameters or calibration values, or to select an appropriate test protocol for the type of test strip coupled to the test circuitry. The identification can be used by the test circuitry to validate or reject a test strip assembly, such as to inhibit use of test strips that fail meet one or more specified criteria.
    Type: Application
    Filed: February 22, 2016
    Publication date: August 24, 2017
    Inventors: Liam Riordan, Tudor M. Vinereanu, Paul V. Errico, Dermot O'Keeffe, Camille L. Huin, Donal Bourke
  • Patent number: 9726702
    Abstract: A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: August 8, 2017
    Assignee: Analog Devices, Inc.
    Inventors: Dermot O'Keeffe, Donal Bourke, David Harty, Tudor Vinereanu, Colin Lyden
  • Patent number: 8971445
    Abstract: A method to adjust a waveform transmitted from a field device to overcome cable bandwidth limitations by passing data to be transmitted through a channel compensation device which pre-distorts data to be transmitted to compensate for the bandwidth limitations. The predistortion may make sure that there is a good quality signal received at the control end of the cable.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: March 3, 2015
    Assignee: Analog Device, Inc.
    Inventors: Dermot O'Keeffe, Tudor Vinereanu
  • Patent number: 8823465
    Abstract: A clock generator is disclosed for use with an oscillator device. The clock generator may include a signal conditioning pre-filter and a comparator. The signal conditioner may have an input for a signal from the oscillator device, and may include a high pass filter component and a low pass filter component. The high pass filter component may pass amplitude and frequency components of the input oscillator signal but reject a common mode component of the oscillator signal. Instead, the high pass filter component further may generate its own common mode component locally over which the high frequency components are superimposed. The low pass filter component may generate a second output signal that represents the locally-generated common mode component of the first output signal. The clock generator may have a comparator as an input stage which is coupled to first and second outputs of the filter structure.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: September 2, 2014
    Assignee: Analog Devices, Inc.
    Inventors: Donal Bourke, Dermot O'Keeffe
  • Publication number: 20130300512
    Abstract: A clock generator is disclosed for use with an oscillator device. The clock generator may include a signal conditioning pre-filter and a comparator. The signal conditioner may have an input for a signal from the oscillator device, and may include a high pass filter component and a low pass filter component. The high pass filter component may pass amplitude and frequency components of the input oscillator signal but reject a common mode component of the oscillator signal. Instead, the high pass filter component further may generate its own common mode component locally over which the high frequency components are superimposed. The low pass filter component may generate a second output signal that represents the locally-generated common mode component of the first output signal. The clock generator may have a comparator as an input stage which is coupled to first and second outputs of the filter structure.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Dermot O'KEEFFE, Donal BOURKE
  • Publication number: 20130271155
    Abstract: A digital sine wave may be converted to an analog signal at a digital to analog converter (DAC). The converted analog signal may be supplied to a device and an analog return signal from the device may be passed through a relaxed anti-aliasing filter and converted to digital code words at an analog to digital converter (ADC). An impedance may be calculated from the results of a Fourier analysis of the digital code words. The ADC and DAC clock frequencies may be asynchronous, independently variable, and have a greatest common factor of 1. The clock frequencies of the ADC and/or DAC may be adjusted to change a location of images in the ADC spectrum. By using these different, adjustable clock frequencies for the ADC and the DAC, an analog signal may have increased aliasing without introducing signal errors at a frequency of interest.
    Type: Application
    Filed: September 25, 2012
    Publication date: October 17, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Dermot O'Keeffe, Donal Bourke, David Harty, Tudor Vinereanu, Colin Lyden
  • Patent number: 8463193
    Abstract: A calibration apparatus for calibrating a communications terminal comprises a data store arranged to store amplifier unspecific power control data, and a processing resource arranged to receive a first indication of a first desired output power level and a second indication of a second desired output power level. The processing resource retrieves from the data store a first amplifier unspecific value associated with the first desired output power level and a second amplifier unspecific value associated with the second desired output power level. An amplifier is operably coupled to the processing resource and arranged to generate a first output signal and a second output signal corresponding to the first and second retrieved values. The processing resource is arranged to receive a first measured value and a second measured value. Also, the processing resource is arranged to support an interpolator for performing an interpolation using the first and second measured values.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: June 11, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Dermot O'Keeffe, Alexander Brophy, Brian Flannelly
  • Publication number: 20130051436
    Abstract: A method to adjust a waveform transmitted from a field device to overcome cable bandwidth limitations by passing data to be transmitted through a channel compensation device which pre-distorts data to be transmitted to compensate for the bandwidth limitations. The predistortion may make sure that there is a good quality signal received at the control end of the cable.
    Type: Application
    Filed: August 25, 2011
    Publication date: February 28, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Dermot O'KEEFFE, Tudor VINEREANU
  • Publication number: 20110143688
    Abstract: A calibration apparatus for calibrating a communications terminal comprises a data store arranged to store amplifier unspecific power control data, and a processing resource arranged to receive a first indication of a first desired output power level and a second indication of a second desired output power level. The processing resource retrieves from the data store a first amplifier unspecific value associated with the first desired output power level and a second amplifier unspecific value associated with the second desired output power level. An amplifier is operably coupled to the processing resource and arranged to generate a first output signal and a second output signal corresponding to the first and second retrieved values. The processing resource is arranged to receive a first measured value and a second measured value. Also, the processing resource is arranged to support an interpolator for performing an interpolation using the first and second measured values.
    Type: Application
    Filed: August 26, 2008
    Publication date: June 16, 2011
    Inventors: Dermot O'keeffe, Alexander Brophy, Brian Flannelly