Abstract: A method of controlling write parameter selection in a memory device, can include: (i) storing a configuration set number in a configuration register, where the configuration register is accessible by a user via an interface; (ii) receiving a write command from a host via the interface; (iii) comparing the stored configuration set number against set numbers in a register block to determine a match or a mismatch; (iv) downloading configuration bits from a memory array into the register block in response to the mismatch determination; (v) selecting a configuration set corresponding to the stored configuration set number from the register block in response to the match determination; and (vi) using the selected configuration set to perform a write operation on the memory device to execute the write command.

Abstract: A method can include determining at least one use characteristic for the memory cells comprising a solid electrolyte, the use characteristic corresponding to a number of times the memory cells have been programmed to at least one impedance level; and adjusting a read threshold level for the memory cells based on at least the use characteristic, the read threshold level determining data values stored in the memory cells in a read operation.

Abstract: A memory device can include at least one array comprising a plurality of elements programmable between at least two different states, each state having a different time to a change in property under applied sense conditions; a read circuit configured to apply the sense conditions to selected elements and detect changes in property of the selected elements to generate read data; a latch circuit configured to store read data from the read circuit; and a transfer path configured to provide a parallel data transfer path between the read circuit and the latch circuit.

Abstract: A method can include determining at least one use characteristic for the memory cells comprising a solid electrolyte, the use characteristic corresponding to a number of times the memory cells have been programmed to at least one impedance level; and adjusting a read threshold level for the memory cells based on at least the use characteristic, the read threshold level determining data values stored in the memory cells in a read operation.