Abstract: Example control circuitry, data storage devices, and methods to provide a spiral data track format that is different from the underlying servo track format are described. The data storage device may include a storage medium configured with a plurality of tracks in at least one continuous spiral pattern and a head actuated over the storage medium. The data tracks may be written to the storage medium with track lengths that are different than a single revolution of the storage medium.

Abstract: Example control circuitry, data storage devices, and methods to provide a spiral data track format that is different from the underlying servo track format are described. The data storage device may include a storage medium configured with a plurality of tracks in at least one continuous spiral pattern and a head actuated over the storage medium. The data tracks may be written to the storage medium with track lengths that are different than a single revolution of the storage medium.

Abstract: Example channel circuits, data storage devices, and methods for using an adjustable code rate based on an extendable parity code matrix are described. Data units may be read from a storage medium. Multiple sets of parity bits may be available for different data units, different sets of parity bits having a different number of parity bits corresponding to different parity matrices and desired code rates. A primary parity matrix may provide a base code rate and one or more extended parity matrices may provide increased code rates based on additional rows for increased decoding. Error correction code (ECC) decoding may be selectively performed based on the different sets of parity bits and corresponding parity matrices, resulting in the output of a decoded data units based on the data units from the read signal.

Abstract: Example channel circuits, data storage devices, and methods for using an extendable parity code matrix are described. A data unit may be read from a storage medium. Multiple sets of parity bits may be available for the data unit, each set of parity bits having a different number of parity bits corresponding to different parity matrices, including a primary parity matrix and at least one extended parity matrix. The extended parity matrix includes the primary parity matrix and additional rows for increased decoding. Error correction code (ECC) decoding may be selectively performed based on the different sets of parity bits and corresponding parity matrices, resulting in the output of a decoded data unit based on the data unit from the read signal.

Abstract: A Data Storage Device (DSD) includes one or more magnetic disks. One or more data blocks are encoded into a first plurality of Error Correction Code (ECC) sub-blocks including a first ECC sub-block. The first plurality of ECC sub-blocks is encoded into a first ECC super-block. The first ECC sub-block is write-verified by reading the first ECC super-block. If the write-verify passes, a second plurality of ECC sub-blocks is encoded into a subsequent ECC super-block. If the write-verify fails, the first ECC sub-block and a subset of the second plurality of ECC sub-blocks are encoded into the subsequent ECC super-block. In another aspect, in response to the first ECC super-block failing to recover the first ECC sub-block, a subsequent ECC super-block is read and a copy of the first ECC sub-block is used if the copy is detected in the subsequent ECC super-block.