Abstract: The present invention comprises a novel foldable and intrinsically safe plate capacitive sensor to measure liquid depths, solids in liquid depths, and two different liquids depths. This invention is used in onsite wastewater management systems (OWTS) to monitor depths of solids, oil, and effluent in a wastewater tank. The plates are configured to allow for solids, liquids and gases to surround the plates. A number of plates are hung in series from near the OWTS tank lid to at least 18 inches below the output baffle to measure the different materials at different depths in the OWTS tank. The capacitive sensors are capable of use with various materials to measure solids, oil, and effluent depths in an OWTS tank.

Abstract: The present invention comprises a novel foldable and intrinsically safe plate capacitive sensor to measure liquid depths, solids in liquid depths, and two different liquids depths. This invention is used in onsite wastewater management systems (OWTS) to monitor depths of solids, oil, and effluent in a wastewater tank. The plates are configured to allow for solids, liquids and gases to surround the plates. A number of plates are hung in series from near the OWTS tank lid to at least 18 inches below the output baffle to measure the different materials at different depths in the OWTS tank. The capacitive sensors are capable of use with various materials to measure solids, oil, and effluent depths in an OWTS tank.

Abstract: An oscillator module used with a plurality of power sources includes an oscillator unit, a clock monitor unit (CMU), a software module and a digital calibration circuit. The oscillator unit generates a clock signal. The CMU is coupled to the oscillator unit, determines whether an amplitude of the clock signal exceeds a predetermined threshold, and outputs an alarm signal if the amplitude of the clock signal is lower than the predetermined threshold. The software module is coupled to the CMU, and receives the alarm signal to output a calibration signal. The digital calibration circuit is coupled to the oscillator and the software module, and outputs a control signal in response to the clock signal and the calibration signal, adjusting the plurality of power sources to modify the clock signal.

Abstract: A power circuit includes a first regulator and an impedance adjustment unit. The first regulator has a loop-back impedance, and provides a first power signal. The impedance adjustment unit is coupled to the first regulator, and operates to cause the first regulator to provide a second power signal having a power level different from that of the first power signal.

Abstract: An oscillator module used with a plurality of power sources includes an oscillator unit, a clock monitor unit (CMU), a software module and a digital calibration circuit. The oscillator unit generates a clock signal. The CMU is coupled to the oscillator unit, determines whether an amplitude of the clock signal exceeds a predetermined threshold, and outputs an alarm signal if the amplitude of the clock signal is lower than the predetermined threshold. The software module is coupled to the CMU, and receives the alarm signal to output a calibration signal. The digital calibration circuit is coupled to the oscillator and the software module, and outputs a control signal in response to the clock signal and the calibration signal, adjusting the plurality of power sources to modify the clock signal.

Abstract: A power circuit includes a first regulator and an impedance adjustment unit. The first regulator has a loop-back impedance, and provides a first power signal. The impedance adjustment unit is coupled to the first regulator, and operates to cause the first regulator to provide a second power signal having a power level different from that of the first power signal.

Abstract: A memory sharing system includes a master control device, a slave control device and a memory device. The master control device selectively generates a clock signal to the memory device. The slave control device receives and tracks the clock signal via a delay phase locked loop (DLL) to generate and align an output signal with the clock signal. The master control device arbitrates an access right.

Abstract: An object detection device includes a RF emitter composed of a RF emitting module and an emitter antenna for emitting an EM wave, a RF receiver composed of a RF receiving module and a RF antenna for receiving a reflected EM wave by a predetermined object and a processor connected to the RF emitter and the RF receiver to process the received reflected EM wave so as to obtain a received signal strength indicator (RSSI) such that existence of the object is determined based on fluctuation of the RSSI when compared with a predetermined threshold value.

Abstract: A DC converter and a mode-switching method used in an electronic apparatus are included. The electronic apparatus includes a subsystem circuit. The DC power converter comprises a first voltage converting circuit electrically connected to the subsystem circuit, receiving a system voltage and a first reference voltage, and converting the system voltage to a first output voltage based on the first reference voltage; and a second voltage converting circuit electrically connected to the subsystem circuit and receiving the system voltage and a second reference voltage, and converting the system voltage to a second output voltage to the same output end of the first voltage converting circuit based on the second reference voltage; wherein the second voltage converting circuit outputs the second output voltage to the subsystem circuit when the first output voltage at the output end is smaller than a threshold.

Abstract: A memory sharing system includes a master control device, a slave control device and a memory device. The master control device selectively generates a clock signal to the memory device. The slave control device receives and tracks the clock signal via a delay phase locked loop (DLL) to generate and align an output signal with the clock signal. The master control device arbitrates an access right.

Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.

Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.

Abstract: A DC converter and a mode-switching method used in an electronic apparatus are included. The electronic apparatus includes a subsystem circuit. The DC power converter comprises a first voltage converting circuit electrically connected to the subsystem circuit, receiving a system voltage and a first reference voltage, and converting the system voltage to a first output voltage based on the first reference voltage; and a second voltage converting circuit electrically connected to the subsystem circuit and receiving the system voltage and a second reference voltage, and converting the system voltage to a second output voltage to the same output end of the first voltage converting circuit based on the second reference voltage; wherein the second voltage converting circuit outputs the second output voltage to the subsystem circuit when the first output voltage at the output end is smaller than a threshold.

Abstract: A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.

Abstract: A technique implements high impedance nodes using high threshold voltage devices that may generate less leakage current and may have a higher gate oxide breakdown voltage than standard devices in a particular manufacturing technology. Under at least one operating condition, for a particular power supply voltage, a circuit may unable to produce a control signal that is sufficient to turn on such a high threshold voltage device. The technique adjusts the control signal voltage to provide a gate-to-source voltage sufficient to turn on the high threshold voltage device. At another power supply voltage, when the circuit is able to produce a control signal sufficient to turn on the high threshold voltage device, the technique does not adjust the control signal.

Abstract: A switched capacitor sampler circuit (220) includes an input terminal (224) for receiving an input voltage, an output terminal (226), a capacitor (222) having first and second terminals, and a switching circuit (230). The switching circuit (230) is coupled to the input terminal (224), the output terminal (226), and the first and second terminals of the capacitor (222). The switching circuit (230) stores a charge on the capacitor (222) proportional to the input voltage during a sample period, and transfers the charge from the capacitor (222) to the output terminal (226) during a transfer period subsequent to the sample period. The switching circuit (230) transfers the charge in a plurality of charge portions corresponding to a like plurality of phases of the transfer period.

Abstract: A switched capacitor input circuit (200) includes an input buffer (210), a switched capacitor sampler circuit (220), and an integrator (250). The input buffer (210) has an input terminal for receiving an input voltage, and an output terminal. The switched capacitor sampler circuit (220) has an input terminal coupled to the output terminal of the input buffer (210), and an output terminal. The switched capacitor sampler circuit (220) includes a capacitor (222) and stores a charge proportional a voltage at the output terminal of the input buffer (210) in the capacitor (222) during a sample period, and transfers the charge from the capacitor (222) to the output terminal thereof during a transfer period subsequent to the sample period in a plurality of charge portions corresponding to a like plurality of phases of the transfer period. The integrator (250) has an input terminal coupled to the output terminal of the switched capacitor sampler circuit, and an output terminal for providing an output voltage signal.

Abstract: A voltage controlled clock synthesizer includes a phase-locked loop (PLL) circuit that receives a timing reference signal, a controllable oscillator circuit, such as a VCO, providing an oscillator output signal, and a feedback divider circuit coupled to the oscillator output signal. The frequency of the oscillator output signal is determined in part according to a stored value used to generate a first digital control signal that determines a divide ratio of the feedback divider circuit. A control voltage present on a voltage control input adjusts the frequency of the oscillator output signal around a frequency determined by the stored value. The control voltage is converted to second digital signal and is utilized in determining the first digital control signal in combination with the stored value.