Patents by Inventor Desheng Hu
Desheng Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11297421Abstract: A bias circuit includes a digital-to-analog converter configured to receive a digital input and output an analog signal; an integrator coupled to a first node that is coupled to the digital-to-analog converter and an amplifier, and coupled to a second node that is coupled to a positive input port of a first comparator and a negative input port of a second comparator; the digital signal processor coupled to an output port of the first comparator and an output port of the second comparator, and coupled to an input port of the digital-to-analog converter.Type: GrantFiled: April 8, 2020Date of Patent: April 5, 2022Assignee: Beken CorporationInventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
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Patent number: 11271577Abstract: An ADC circuit is provided. The ADC circuit may include an array of bit capacitors; a comparator electrically connected to the bit capacitors; a NOR gate electrically connected to the comparator; an AND gate to create an asynchronous clock (ACLK) based on a digital output from the NOR and a synchronous clock (CLKin); a delay control circuit to receive the asynchronous clock and to create a delayed asynchronous clock (ACLKd); and a SAR control circuit to receive a digital output from an output end of the comparator, to receive the delayed asynchronous clock, to transmit a bit control signal (B<9:1>) to the bit capacitors, and to transmit a delay control word (DL<7:1>) to the delay control circuit. The ADC circuit can create an asynchronous comparator clock (CKcmp) with a maximum delay value (Td_max), thus leading to an improved conversion linearity and a reduced power consumption.Type: GrantFiled: February 2, 2021Date of Patent: March 8, 2022Assignee: Beken CorporationInventors: Desheng Hu, Jiazhou Liu, Cunpeng Zhang
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Patent number: 11218127Abstract: A power amplifier includes a digital-to-analog converter, a loop filter, a driver circuit, a first adjustable reference resistor and a second adjustable reference resistor. A circuit includes an overcurrent protection circuit and a power amplifier, wherein the overcurrent protection circuit is communicatively coupled to the power amplifier. The digital-to-analog converter is configured to receive a digital signal and to output an analog signal, the driver circuit communicatively coupled to the loop filter and at least one of a first output port and a second output port of the power amplifier.Type: GrantFiled: June 5, 2020Date of Patent: January 4, 2022Assignee: Beken CorporationInventors: Donghui Gao, Desheng Hu, Jiazhou Liu
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Publication number: 20210351756Abstract: A power amplifier includes a digital-to-analog converter, a loop filter, a driver circuit, a first adjustable reference resistor and a second adjustable reference resistor. A circuit includes an overcurrent protection circuit and a power amplifier, wherein the overcurrent protection circuit is communicatively coupled to the power amplifier. The digital-to-analog converter is configured to receive a digital signal and to output an analog signal, the driver circuit communicatively coupled to the loop filter and at least one of a first output port and a second output port of the power amplifier.Type: ApplicationFiled: June 5, 2020Publication date: November 11, 2021Applicant: Beken CorporationInventors: Donghui Gao, Desheng HU, Jiazhou Liu
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Patent number: 11152892Abstract: A method and a system of calibrating a DC offset voltage on a resistor load are provided. The system may include a first operational amplifier, a second operational amplifier, a comparator, a digital signal processor, and a digital to analog convertor. At a calibration mode, under control of the digital signal processor, the system may utilize open-loop high gain characteristics of the first operational amplifier and the comparator to automatically detect and calibrate the DC offset voltage. At an operation mode, the system may automatically compensate the DC offset voltage based on the calibration of the DC offset voltage. In this way, the system and the method can automatically detect, calibrate, and compensate the DC offset voltage with reduced cost and technical complexity.Type: GrantFiled: February 19, 2020Date of Patent: October 19, 2021Assignee: Beken Corp ShenzhenInventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
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Publication number: 20210297774Abstract: A bias circuit includes a digital-to-analog converter configured to receive a digital input and output an analog signal; an integrator coupled to a first node that is coupled to the digital-to-analog converter and an amplifier, and coupled to a second node that is coupled to a positive input port of a first comparator and a negative input port of a second comparator; the digital signal processor coupled to an output port of the first comparator and an output port of the second comparator, and coupled to an input port of the digital-to-analog converter.Type: ApplicationFiled: April 8, 2020Publication date: September 23, 2021Applicant: Beken CorporationInventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
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Patent number: 11115042Abstract: A low pass filter embedded digital-to-analog converter including a first switch coupled to a first node that is coupled to a fourth switch and a first capacitor, a second switch coupled to a second node that is coupled to the first capacitor and a third switch, a negative input of a first operational amplifier coupled to a third node that is coupled to the third switch and a second capacitor, and an output port of the first operational amplifier coupled to a fourth node that is coupled to the second capacitor and the fourth switch.Type: GrantFiled: November 19, 2020Date of Patent: September 7, 2021Assignee: Beken CorporationInventors: Desheng Hu, Jiazhou Liu, Dawei Guo
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Publication number: 20210184629Abstract: A method and a system of calibrating a DC offset voltage on a resistor load are provided. The system may include a first operational amplifier, a second operational amplifier, a comparator, a digital signal processor, and a digital to analog convertor. At a calibration mode, under control of the digital signal processor, the system may utilize open-loop high gain characteristics of the first operational amplifier and the comparator to automatically detect and calibrate the DC offset voltage. At an operation mode, the system may automatically compensate the DC offset voltage based on the calibration of the DC offset voltage. In this way, the system and the method can automatically detect, calibrate, and compensate the DC offset voltage with reduced cost and technical complexity.Type: ApplicationFiled: February 19, 2020Publication date: June 17, 2021Applicant: Beken Corporation Shenzhen BranchInventors: Desheng Hu, Donghui Gao, Jiazhou Liu, Dawei Guo
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Patent number: 8928515Abstract: An analog-to-digital converter (ADC) comprises a sample/hold (S/H) unit, a digital-to-analog converter (DAC), a comparing unit, and a control unit. The S/H unit samples a first analog signal. The control unit comprises a compensating unit. The compensating unit receives an indication signal, and compensates a current bit and all its less significant bits, such that the sum of the current bit and all its less significant bits approximates a bit weight of the current bit, when the indication signal indicates that the comparison result cannot be determined. The compensating unit then outputs the compensated current bit and all its less significant bits together with more significant bits of the current bit.Type: GrantFiled: March 1, 2014Date of Patent: January 6, 2015Assignee: Beken CorporationInventors: Desheng Hu, Dawei Guo