Patents by Inventor Devanand Krishna SHENOY

Devanand Krishna SHENOY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ML-enabled assured microelectronics manufacturing: a technique to mitigate hardware trojan detection
    Patent number: 12198325
    Abstract: A method for assuring that integrated circuits are free of malicious circuit insertions and/or IC design modifications through mask swapping/addition is provided. The method includes a step of comparing 3D tomographic images constructed from design GDS to the 3D tomographic images constructed from in-line fab metrology data.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 14, 2025
    Assignee: University of Southern California
    Inventors: Ajey Poovannummoottil Jacob, John Damoulakis, Akhilesh Jaiswal, Devanand Krishna Shenoy, Andrew Rittenbach
  • ML-ENABLED ASSURED MICROELECTRONICS MANUFACTURING: A TECHNIQUE TO MITIGATE HARDWARE TROJAN DETECTION
    Publication number: 20210342991
    Abstract: A method for assuring that integrated circuits are free of malicious circuit insertions and/or IC design modifications through mask swapping/addition is provided. The method includes a step of comparing 3D tomographic images constructed from design GDS to the 3D tomographic images constructed from in-line fab metrology data.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 4, 2021
    Inventors: Ajey Poovannummoottil JACOB, John DAMOULAKIS, Akhilesh JAISWAL, Devanand Krishna SHENOY, Andrew RITTENBACH