Patents by Inventor Devarshi S. Patel

Devarshi S. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer memory subsystem for enhancing signal quality
    Patent number: 8799606
    Abstract: Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: August 5, 2014
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Jonathan R. Hinkle, Devarshi S. Patel, Pravin S. Patel, Kevin M. Reinberg
  • Computer Memory Subsystem For Enhancing Signal Quality
    Publication number: 20090164672
    Abstract: Computer memory subsystems are disclosed for enhancing signal quality that include: one or more memory modules; a memory bus; and a memory controller connected to the memory modules through the memory bus, the memory controller including a reception buffer connected to the memory bus, the reception buffer capable of receiving an input signal from one of the memory modules, the memory controller including a reception characteristics table capable of storing reception characteristics for each of the memory modules connected to the memory controller, the memory controller including an equalizer connected to the reception buffer and the reception characteristics table, the equalizer capable of equalizing the received input signal in dependence upon the reception characteristics for the memory module from which the input signal was received, and the memory controller including memory controller logic connected to the equalizer, the memory controller logic capable of processing the equalized input signal.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 25, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Justin P. Bandholz, Jonathan R. Hinkle, Devarshi S. Patel, Pravin S. Patel, Kevin M. Reinberg