Patents by Inventor Devendra Joshi

Devendra Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210174901
    Abstract: Provided herein are methods for simultaneously identifying genomic copy number variations (CNVs) and sequence variations in an enriched genomic sample and compositions, systems, and kits for performing such methods. In some aspects, the methods include: (a) obtaining a plurality of sequence reads from an enriched genomic sample that includes a plurality of genomic backbone regions and a plurality of genomic mutation regions of interest in a genomic locus of a subject; (b) obtaining a plurality of sequence reads from corresponding genomic backbone regions and genomic mutation regions of at least one reference genomic sample; (c) assembling the plurality sequence reads from the enriched genomic sample and the at least one reference genomic sample; and (d) determining, based on computational analysis of the assembly, whether the genomic locus has a copy number variation (CNV) and/or a sequence variation.
    Type: Application
    Filed: December 24, 2020
    Publication date: June 10, 2021
    Inventors: Ashutosh, Devendra Joshi, Arjun Vadapalli, Jayati Ghosh
  • Publication number: 20200105371
    Abstract: Provided herein is a method for identifying a sequence variant in an enriched sample. In certain embodiments, this method may comprise: (a) obtaining: (i) a plurality of sequence reads from a sample that has been enriched for a genomic region and (ii) a reference sequence for the genomic region; (b) assembling the sequence reads to obtain a plurality of discrete sequence assemblies that correspond to potential variants; (c) determining which of the potential variants are true and which are artifacts by examining the sequence reads that make up each of the discrete sequence assemblies; (d) optionally determining whether each of the true potential variants contains a mutation that is known to be associated with the reference sequence; and (e) outputting a report indicating whether the sample comprises a sequence variant.
    Type: Application
    Filed: October 2, 2019
    Publication date: April 2, 2020
    Inventors: . Ashutosh, Devendra Joshi, Christian A. Le Cocq
  • Publication number: 20160300013
    Abstract: Provided herein are methods for simultaneously identifying genomic copy number variations (CNVs) and sequence variations in an enriched genomic sample and compositions, systems, and kits for performing such methods. In some aspects, the methods include: (a) obtaining a plurality of sequence reads from an enriched genomic sample that includes a plurality of genomic backbone regions and a plurality of genomic mutation regions of interest in a genomic locus of a subject; (b) obtaining a plurality of sequence reads from corresponding genomic backbone regions and genomic mutation regions of at least one reference genomic sample; (c) assembling the plurality sequence reads from the enriched genomic sample and the at least one reference genomic sample; and (d) determining, based on computational analysis of the assembly, whether the genomic locus has a copy number variation (CNV) and/or a sequence variation.
    Type: Application
    Filed: April 10, 2015
    Publication date: October 13, 2016
    Inventors: Ashutosh, Devendra Joshi, Arjun Vadapalli, Jayati Ghosh
  • Publication number: 20150073724
    Abstract: Provided herein is a method for identifying a sequence variant in an enriched sample. In certain embodiments, this method may comprise: (a) obtaining: (i) a plurality of sequence reads from a sample that has been enriched for a genomic region and (ii) a reference sequence for the genomic region; (b) assembling the sequence reads to obtain a plurality of discrete sequence assemblies that correspond to potential variants; (c) determining which of the potential variants are true and which are artifacts by examining the sequence reads that make up each of the discrete sequence assemblies; (d) optionally determining whether each of the true potential variants contains a mutation that is known to be associated with the reference sequence; and (e) outputting a report indicating whether the sample comprises a sequence variant.
    Type: Application
    Filed: May 27, 2014
    Publication date: March 12, 2015
    Inventors: Ashutosh, Devendra Joshi, Christian A. Le Cocq
  • Publication number: 20120290340
    Abstract: The preferred embodiment of the present invention is directed to a method, system and apparatus to automate the sale and purchase of entertainment tickets along with concessions and/or merchandize, individually or as a package, in the electronic media comprising web, mobile apps and social media channels.
    Type: Application
    Filed: June 6, 2012
    Publication date: November 15, 2012
    Inventors: SRINIVASAN RAMANUJAM, Devendra Joshi
  • Patent number: 8161423
    Abstract: An apparatus and method for optical lithography verification includes filtering a lithography simulation of proposed sub-lightwave pattern formations during at feast one design phase or manufacturing phase of an article of manufacture having sub-lightwave structures and then detecting design phase or manufacturing phase defects in response to the filtering of the lithography simulation.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: April 17, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventor: Devendra Joshi
  • Publication number: 20120072298
    Abstract: The preferred embodiment of the present invention is directed to a method, and system to automate real time price negotiation and bargaining followed by actual purchase of merchandize or service at a retail location. The merchandize can range from real goods and/or service(s) available at any store or retail outlet to entertainment such as movies, concerts, sporting events and others.
    Type: Application
    Filed: August 19, 2011
    Publication date: March 22, 2012
    Inventors: Srinivasan Ramanujam, Devendra Joshi
  • Patent number: 7849423
    Abstract: A photomask dataset corresponding to a target-pattern is verified by simulating a resist-pattern that will be formed in a resist layer by a lithography process, simulating an etched-pattern that will be etched in a layer by a plasma process wherein said simulation comprises calculating a flux of particles impacting a feature, and determining whether the etched-pattern substantially conforms to the target-pattern.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: December 7, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bayram Yenikaya, Devendra Joshi, Paul A. Fornari, Jesus O. Carrero, Abdurrahman Sezginer
  • Patent number: 7530048
    Abstract: An apparatus and method for optical lithography verification includes filtering a lithography simulation of proposed sub-lightwave pattern formations during at least one design phase or manufacturing phase of an article of manufacture having sub-lightwave structures and then detecting design phase or manufacturing phase defects in response to the filtering of the lithography simulation.
    Type: Grant
    Filed: April 9, 2005
    Date of Patent: May 5, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventor: Devendra Joshi
  • Patent number: 7401319
    Abstract: A hierarchical representation encapsulates the detailed internal composition of a sub-circuit using the notion of a cell definition (a CellDef). The CellDef serves as a natural unit for operational reuse. If the computation required for the analysis or manipulation (e.g. parasitic extraction, RET, design rule confirmation (DRC), or OPC) based on a CellDef or one cell instance can be applied, with no or minimal additional effort, to all or a significant subset of other instances of the cell, very substantial reduction in computational effort may be realized. Furthermore, a hierarchical representation also allows for the partitioning of the overall analysis/manipulation task into a collection of subtasks, e.g. one per CellDef. Multiple jobs may then be distributed across a large number of computational nodes on a network for concurrent execution. While this may not reduce the aggregate computational time, a major reduction in the overall turnaround time (TAT) is in itself extremely beneficial.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: July 15, 2008
    Assignee: Invarium, Inc.
    Inventors: Chi-Song Horng, Devendra Joshi, Anwei Liu
  • Patent number: 7246343
    Abstract: A method and system for reducing the computation time required to apply position-dependent corrections to lithography, usually mask, data is disclosed. Optical proximity or process corrections are determined for a few instances of a repeating cluster or object, usually at widely separated locations and then interpolating the corrections to the other instances of the repeating cluster based on their positions in the exposure field. Or, optical proximity corrections can be applied to the repeating cluster of objects for different values of flare intensity, or another parameter of patterning imperfection, such as by calculating the value of the flare at the location of each instance of the repeating cluster, and interpolating the optical proximity corrections to those values of flare.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: July 17, 2007
    Assignee: Invarium, Inc.
    Inventors: Devendra Joshi, Abdurrahman Sezginer, Franz X. Zach
  • Publication number: 20060228041
    Abstract: An apparatus and method for optical lithography verification includes filtering a lithography simulation of proposed sub-lightwave pattern formations during at least one design phase or manufacturing phase of an article of manufacture having sub-lightwave structures and then detecting design phase or manufacturing phase defects in response to the filtering of the lithography simulation.
    Type: Application
    Filed: April 9, 2005
    Publication date: October 12, 2006
    Applicant: Invarium, Inc.
    Inventor: Devendra Joshi
  • Publication number: 20060143589
    Abstract: A hierarchical representation encapsulates the detailed internal composition of a sub-circuit using the notion of a cell definition (a CellDef). The CellDef serves as a natural unit for operational reuse. If the computation required for the analysis or manipulation (e.g. parasitic extraction, RET, design rule confirmation (DRC), or OPC) based on a CellDef or one cell instance can be applied, with no or minimal additional effort, to all or a significant subset of other instances of the cell, very substantial reduction in computational effort may be realized. Furthermore, a hierarchical representation also allows for the partitioning of the overall analysis/manipulation task into a collection of subtasks, e.g. one per CellDef. Multiple jobs may then be distributed across a large number of computational nodes on a network for concurrent execution. While this may not reduce the aggregate computational time, a major reduction in the overall turnaround time (TAT) is in itself extremely beneficial.
    Type: Application
    Filed: December 23, 2004
    Publication date: June 29, 2006
    Applicant: Invarium, Inc.
    Inventors: Chi-Song Horng, Devendra Joshi, Anwei Liu
  • Publication number: 20060048091
    Abstract: A method and system for reducing the computation time required to apply position-dependent corrections to lithography, usually mask, data is disclosed. Optical proximity or process corrections are determined for a few instances of a repeating cluster or object, usually at widely separated locations and then interpolating the corrections to the other instances of the repeating cluster based on their positions in the exposure field. Or, optical proximity corrections can be applied to the repeating cluster of objects for different values of flare intensity, or another parameter of patterning imperfection, such as by calculating the value of the flare at the location of each instance of the repeating cluster, and interpolating the optical proximity corrections to those values of flare.
    Type: Application
    Filed: September 1, 2004
    Publication date: March 2, 2006
    Applicant: Invarium, Inc.
    Inventors: Devendra Joshi, Abdurrahman Sezginer, Franz Zach