Abstract: Aspects of the present disclosure provide a method of fabricating a resistive random access memory (RRAM). For example, the method can include providing a substrate, forming a first electrode on the substrate, and forming a first metal oxide layer on the first electrode. The first metal oxide layer can act as a sink or reservoir of oxygen atoms that interact with a current conducting filament. The method can further include forming a second metal oxide layer on the first metal oxide layer. The second metal oxide layer can be configured to form conduction paths. The method can further include forming a second electrode on the second metal oxide layer. In an embodiment, the first metal oxide layer can be formed on a portion of the first electrode.

Abstract: Provided are a method for etching a phase change material of a phase change memory device and a semiconductor device formed according to the method. A temperature of the phase change memory device is lowered to a target temperature. A plasma etching process is applied to pattern the phase change material in response to cooling the temperature of the phase change memory device to the target temperature.

Abstract: A method for processing a substrate includes having a plasma-enhanced chemical vapor deposition (PECVD) chamber including sidewall gas inlets and a top gas inlet disposed on a top plate of the PECVD chamber. The method further includes receiving the substrate on a substrate holder disposed within the PECVD chamber, and flowing a precursor gas mixture into the PECVD chamber through the sidewall gas inlets at a first flow rate and the top gas inlet at a second flow rate. And the method further includes applying a source power to the top plate to form a plasma from the precursor gas mixture, and exposing the substrate to the plasma to deposit a dielectric layer over the substrate, the dielectric layer has an edge thickness at edges of the substrate and a center thickness in a center region of the substrate, the edge thickness is different from the center thickness.

Abstract: Provide an initial structure including a bottom electrode layer, a phase change material layer outward of the bottom electrode, a top electrode layer outward of the phase change material layer, and a patterned hard mask outward of the phase change material layer. Etch the initial structure using a first halogen plasma etchant at high wafer temperature to partially remove portions of the top electrode layer not protected by the patterned hard mask to produce an intermediate structure. Etch the intermediate structure using a second halogen plasma etchant at low wafer temperature to remove a remaining portion of the top electrode layer down to the phase change material layer, leaving a web of top electrode layer material under the patterned hard mask. Etch portions of the phase change material layer not protected by the web of top electrode layer material down to the bottom electrode layer, and remove the patterned mask.

Abstract: Provide an initial structure comprising a substrate, a hard mask outward of the substrate, a sacrificial organic layer outward of the hard mask, an anti-reflective coating outward of the sacrificial organic layer, and a patterned photoresist outward of the anti-reflective coating. Etch the initial structure to remove portions of the sacrificial organic layer and the anti-reflective coating not protected by the patterned photoresist down to the hard mask, to form sacrificial organic layer pillars under the patterned photoresist. Trim a critical dimension (CD) of the sacrificial organic layer pillars by etching with a gas that is selective to the anti-reflective coating and the hard mask, to trim sidewalls of the sacrificial organic layer pillars.

Abstract: A semiconductor substrate can be loaded into a plasma chamber, the semiconductor substrate having a through opening within a mask layer disposed over the semiconductor substrate. Using a plasma process, a through substrate via can be formed within the semiconductor substrate. The through substrate via can have a circular shape or an annulus shape with an inner semiconductor core. The plasma process can include exposing the through opening to a plasma chemistry formed from a gas mixture comprising boron, chlorine, fluorine, carbon, and sulfur.

Abstract: A method of plasma processing that includes maintaining a plasma processing chamber between 10° C. to 200° C., flowing oxygen and nitrogen into the plasma processing chamber, where a ratio of a flow rate of the nitrogen to a flow rate of oxygen is between about 1:5 and about 1:1, and etching a ruthenium/osmium layer by sustaining a plasma in the plasma processing chamber.

Abstract: Embodiments of process flows and methods are provided for forming a resistive switching random access memory (ReRAM). More specifically, process flows and methods are provided for reducing the forming voltage needed to form a conductive path in the ReRAM cells. A wide variety of plasma doping processes are used to introduce a plurality of different dopants into a metal-oxide dielectric film. By utilizing at least two different dopants, the plasma doping processes described herein reduce the forming voltage of the subsequently formed ReRAM cell compared to conventional processes that use only one dopant. In some embodiments, the forming voltage may be further reduced by applying a bias power during the plasma doping process, wherein the bias power is preselected to increase the number of ions introduced into the metal-oxide dielectric film during the plasma doping process.

Abstract: A resistive memory device with an embedded shoulder pulled sidewall spacer and method of forming. The method includes providing a patterned film stack containing a lower electrode layer, a dielectric filament layer on the lower electrode layer, and an upper electrode layer on the dielectric filament layer, depositing a conformal cap layer on the patterned film stack, dry etching the conformal cap layer to form a sidewall spacer on sidewalls of the patterned film stack, where a top of the sidewall spacer is recessed to below a top of the upper electrode layer by the dry etching. The method further includes encapsulating the patterned film stack in an isolation layer, and etching the isolation layer to expose the upper electrode layer without exposing the sidewall spacer.

Abstract: Embodiments of process flows and methods are provided for forming a resistive switching random access memory (ReRAM). More specifically, process flows and methods are provided for reducing the forming voltage needed to form a conductive path in the ReRAM cells. A wide variety of plasma doping processes are used to introduce a plurality of different dopants into a metal-oxide dielectric film. By utilizing at least two different dopants, the plasma doping processes described herein reduce the forming voltage of the subsequently formed ReRAM cell compared to conventional processes that use only one dopant. In some embodiments, the forming voltage may be further reduced by applying a bias power during the plasma doping process, wherein the bias power is preselected to increase the number of ions introduced into the metal-oxide dielectric film during the plasma doping process.

Abstract: A resistive random access memory (RERAM) apparatus and method for forming the apparatus are provided. Oxygen content control in the RERAM is provided. To provide oxygen content control, a via to an electrode of the RERAM is formed utilizing an oxygen-free plasma etch step. In one embodiment, the dielectric within which the via is formed is silicon nitride (SiN). In exemplary embodiments, the plasma chemistry is a hydrofluorocarbon (CxHyFz)-based plasma chemistry or a fluorocarbon (CxFy)-based plasma chemistry. In one embodiment, the resistive layer of the RERAM is a metal oxide. In another embodiment, the oxygen concentrations in the electrode of the RERAM under the via and outside the via are the same after formation of the via.

Abstract: A method of plasma processing that includes maintaining a plasma processing chamber between 10° C. to 200° C., flowing oxygen and nitrogen into the plasma processing chamber, where a ratio of a flow rate of the nitrogen to a flow rate of oxygen is between about 1:5 and about 1:1, and etching a ruthenium/osmium layer by sustaining a plasma in the plasma processing chamber.

Abstract: A resistive random access memory (RERAM) apparatus and method for forming the apparatus are provided. Oxygen content control in the RERAM is provided. To provide oxygen content control, a via to an electrode of the RERAM is formed utilizing an oxygen-free plasma etch step. In one embodiment, the dielectric within which the via is formed is silicon nitride (SiN). In exemplary embodiments, the plasma chemistry is a hydrofluorocarbon (CxHyFz)-based plasma chemistry or a fluorocarbon (CxFy)-based plasma chemistry. In one embodiment, the resistive layer of the RERAM is a metal oxide. In another embodiment, the oxygen concentrations in the electrode of the RERAM under the via and outside the via are the same after formation of the via.

Abstract: Described herein are photomask blanks and photomasks prepared therefrom, methods for producing the photomask blanks and apparatus used in such methods. In one aspect, there is described methods for preparing photomask blanks having layers with a compositional gradient, i.e., a varying composition through the thickness of the layer. In other aspects, either in conjunction with the above aspects or independently, methods and apparatus are provided which allow more efficient use of a cluster tool for preparing the photomask blanks and performing quality control on them. The inventions find applicability, for example, in preparing binary photomask blanks and phase shift photomask blanks.