Patents by Inventor Devin Cao

Devin Cao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973143
    Abstract: Integrated circuit structures having source or drain structures and germanium N-channels are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion, the upper fin portion including germanium. A gate stack is over the upper fin portion of the fin. A first source or drain structure includes an epitaxial structure embedded in the fin at a first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at a second side of the gate stack. Each epitaxial structure includes a first semiconductor layer in contact with the upper fin portion, and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer comprises silicon, germanium and phosphorous, and the second semiconductor layer comprises silicon and phosphorous.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: April 30, 2024
    Assignee: Intel Corporation
    Inventors: Ryan Keech, Benjamin Chu-Kung, Subrina Rafique, Devin Merrill, Ashish Agrawal, Harold Kennel, Yang Cao, Dipanjan Basu, Jessica Torres, Anand Murthy
  • Publication number: 20230159629
    Abstract: A method of modulating growth factor responses of cells expressing C3a receptor (C3aR) and C5a receptor (C5aR) and at least one growth factor receptor includes administering to the cells a thrombin inhibitor.
    Type: Application
    Filed: January 12, 2023
    Publication date: May 25, 2023
    Inventors: M. Edward Medof, Devin Cao, Daniel Counihan, Shiva Sridar