Patents by Inventor Devon Jenson

Devon Jenson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180273170
    Abstract: An unmanned aerial vehicle (UAV) including wing sections and hinge assemblies. Each wing section includes an airfoil and a propulsion unit. The wing sections are arranged side-by-side, pivotably connected by the hinge assemblies to define an airframe module. The airframe module is transitionable between a fixed-wing state and a rotor state. In the fixed-wing state, the airframe module has an elongated shape extending between opposing, first and second ends. In the rotor state, the first end is immediately proximate the second end. With this construction, the UAV provides two distinct modes of flight (fixed-wing for low power flight, and rotor for high maneuverability flight (including hover)). The wing sections can carry solar cells and a battery. A maximum power point tracker (MPPT) can be provided for optimizing the match between the solar array and the battery. The propulsion unit can include a variable pitch propeller.
    Type: Application
    Filed: March 21, 2018
    Publication date: September 27, 2018
    Applicant: Regents of the University of Minnesota
    Inventors: Ruben Raphael D'Sa, Nikolaos Papanikolopoulos, Devon Jenson, Travis Henderson, John Kilian
  • Patent number: 10063255
    Abstract: In some examples, a device includes an integrated circuit comprising a computational unit configured to process at least two input bit streams that each include a sequential set of data bits or two or more sets of data bits in parallel that is deterministically encoded to represent numerical values based on a probability that any data bit in the bit stream is high. In some examples, the computational unit includes a convolver configured to generate pair-wise bit combinations of the data bits of the input bit streams. In some examples, e computational unit further includes a stochastic computational unit configured to perform a computational operation on the pair-wise bit combinations and produce an output bit stream having a set of data bits indicating a result of the computational operation based on a probability that any data bit in the set of data bits of the output bit stream is high.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: August 28, 2018
    Assignee: Regents of the University of Minnesota
    Inventors: Marcus Riedel, Devon Jenson
  • Publication number: 20170359082
    Abstract: In some examples, a device includes an integrated circuit comprising a computational unit configured to process at least two input bit streams that each include a sequential set of data bits or two or more sets of data bits in parallel that is deterministically encoded to represent numerical values based on a probability that any data bit in the bit stream is high. In some examples, the computational unit includes a convolver configured to generate pair-wise bit combinations of the data bits of the input bit streams. In some examples, e computational unit further includes a stochastic computational unit configured to perform a computational operation on the pair-wise bit combinations and produce an output bit stream having a set of data bits indicating a result of the computational operation based on a probability that any data bit in the set of data bits of the output bit stream is high.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 14, 2017
    Inventors: Marcus Riedel, Devon Jenson