Abstract: A circuit design is simulated in a simulation environment. When a simulation model in the simulation environment transfers state information to a second simulation model, the simulation environment receives the state information and makes it available to the second simulation model without simulating the transfer through the simulated circuit design.

Abstract: An optimizing hardware-software co-verification system is disclosed including a number of bus interface models, a number of memory models, and a co-verification optimization manager for co-verifying a hardware-software system having memory. Co-verification is performed with a single coherent view of the memory of the hardware-software system, transparently maintained by the co-verification optimization manager for both the hardware and software verifications. This single coherent view includes at least one segment of the memory being viewed as configured for having selected portions of the segment to be statically or dynamically configured/reconfigured for either unoptimized or optimized accesses, wherein unoptimized accesses are performed through hardware verification, and optimized accesses are performed “directly” by the co-verification optimization manager, by-passing hardware verification.

Abstract: An optimizing hardware-software co-simulator is constituted with a logic simulator, a number of bus interface models, a number of memory models, a number of instruction set simulators, and a co-simulation optimization manager for co-simulating a hardware-software system having memory. Co-simulation is performed with a single coherent view of the memory of the hardware-software system, transparently maintained by the co-simulation optimization manager for both the hardware and software simulations. This single coherent view includes at least one segment of the memory being viewed as configured for having selected portions of the segment to be statically or dynamically configured/reconfigured for either unoptimized or optimized accesses, wherein unoptimized accesses are performed through hardware simulation, and optimized accesses are performed "directly" by the co-simulation optimization manager, by-passing hardware simulation.